TI**中英文对照(2)-简化合并单元—在“智能电网”中测量大量电流和电压

1万 · 2015-4-28 08:59

Simplifying merging units - Measuring a large numbers of currents and voltages in a “smart grid”

The “smarts” in a smart grid come from the ability the grid has to measure, control and communicate. Once a measurement is done, communication between the power distribution company and the customer creates an automated and widely-distributed electricity network that can protect, monitor, and optimize the operation of the interconnected components. This new automated network allows for utility companies to respond more efficiently to customer demand, and enables consumers to take more control over their energy usage through increased access to information.

智能电网中的“智能”源自电网所具有的测量、控制和通信功能。一旦完成测量，配电公司和用户之间生成一个能够保护、监视和优化互连组件运行的自动且分布广泛的电网。这个全新的自动网络可以使公共事业公司对于用户的需求做出更有效的响应，并且能够使用户通过不断获得更多的信息来控制用电量。

1万 · 2015-4-28 08:59

In today’s complex power grid, the number of channels of currents and voltages that need to be monitored or measured are increasing dramatically. One of the challenges that directly flow from this is how to handle the large number of analog inputs coming in and then even after digitizing the signal how to get it into the processor without overwhelming the processor interface.

在目前的复杂电网中，需要监视或测量的电流和电压通道的数量正在快速增长。与这点直接相关的是如何处理手头的大量模拟输入，然后在信号数字化后，怎样在不使处理器接口负担过重的情况下将这些数据输入到处理器中。

1万 · 2015-4-28 09:00

A merging unit is the interface from the physical analog world to the digital world using communication networks. The analog signal is converted to a digital signal and transmitted through -Ethernet network based on IEC 61850-9-2 (sampled values) communication protocol.

一个合并单元就是使用通信网络将物理模拟世界与数字世界连接在一起的接口。模拟信号被转换为数字信号，并通过基于IEC 61850-9-2（采样值）通信协议的以太网进行传输。

1万 · 2015-4-28 09:01

The TI reference design for the analog front end (AFE) for merging units (TIDA-00307) shows how multiple channels (8 at a time) can be modularly added to increase signal handling by adding additional successive-approximation-register (SAR) analog to digital converters (ADCs).

TI针对合并单元中所使用的模拟前端 (AFE) 的参考设计 (TIDA-00307) 显示了如何通过添加额外的逐次逼寄存器 (SAR) 模数转换器 (ADC)，将多个通道（一次8条通道）以模块化的方式添加在一起来增加信号处理能力。

1万 · 2015-4-28 09:01

Multiple ADCs can then be connected together by using the daisy chain feature available on the SPI on the ADC, thereby minimizing the connectivity overhead from multiple ADCs to the controller.

然后，多个ADC可通过使用SPI和ADC上提供的菊花链功能被连接在一起，从而最大限度地减少多个ADC到控制器的互联互通开销。

1万 · 2015-4-28 09:02

The ADS8688 SAR ADC used in the reference design operates at a throughput of 500 kSPS. The device features integrated analog front-end circuitry for each input channel with overvoltage protection up to ±20 V, an 8-channel multiplexer with automatic and manual scanning modes, and an on-chip 4.096-V reference with extremely low drift. Operating on a single analog supply of 5 V, each input channel on the device can support true bipolar input ranges of ±2.56 V, ±5.12 V and ±10.24 V.
参考设计中使用的ADS8688 SAR ADC的数据吞吐量为500kSPS。此器件针对每个输入通道的集成式模拟前端电路，具有高达±20V的过压保护，一个支持自动和手动扫描模式的8通道复用器，以及一个具有极低漂移的片上4.096V基准。由单个5V模拟电源供电运行，器件上的每个输入通道可以支持±2.56V，±5.12V和±10.24V的真正双极输入范围。

1万 · 2015-4-28 09:02

The device also offers second-order antialiasing filter, ADC driver amplifier and an extended industrial-temperature range. Additionally, this solution enables simultaneous sampling. When two devices are connected in daisy chain and the same chip selected is asserted for sampling, sampling delay will be minimal between the CH0 of ADC1 and CH0 of ADC2.

此器件还提供二阶抗混叠滤波器，ADC驱动器放大器和一个扩展工业温度范围。此外，这个解决方案可实现同时采样。当两个器件以菊花链的方式连接在一起，并且同一芯片被置为有效，用于采样的话，ADC1的CH0和ADC2的CH0之间的采样延迟将最小。

1万 · 2015-4-28 09:03

This solution from TI shows how a merging unit can not only be designed in a modular fashion, which enables the easy increase in channels as needed, but also how to interface the ADC to the processor without overloading the processor’s interface. In addition, this solution is not only compact with a high level of integration but it also allows simultaneous sampling when using multiple ADCs.

TI的这个解决方案显示出合并单元是如何能够以模块化的方式实现，从而可以根据需要轻松增加通道数量，以及如何在不过度增加处理器接口负担的情况下实现ADC与处理器的对接。此外，这个解决方案不但紧凑小巧，具有高集成度，而且在使用多个ADC时可实现同时采样。