关于OLED iic驱动

只看该作者 · 2018-9-16 23:00

enum _i2c_transfer_states
{
kIdleState = 0x0U,          /*!< I2C bus idle. */
kCheckAddressState = 0x1U,    /*!< 7-bit address check state. */
kSendCommandState = 0x2U,    /*!< Send command byte phase. */
kSendDataState = 0x3U,       /*!< Send data transfer phase. */
kReceiveDataBeginState = 0x4U, /*!< Receive data transfer phase begin. */
kReceiveDataState = 0x5U,    /*!< Receive data transfer phase. */
};

只看该作者 · 2018-9-16 23:00

enum _i2c_flag_constants
{
/*! All flags which are cleared by the driver upon starting a transfer. */
#if defined(FSL_FEATURE_I2C_HAS_START_STOP_DETECT) && FSL_FEATURE_I2C_HAS_START_STOP_DETECT
kClearFlags = kI2C_ArbitrationLostFlag | kI2C_IntPendingFlag | kI2C_StartDetectFlag | kI2C_StopDetectFlag,
kIrqFlags = kI2C_GlobalInterruptEnable | kI2C_StartStopDetectInterruptEnable,
#elif defined(FSL_FEATURE_I2C_HAS_STOP_DETECT) && FSL_FEATURE_I2C_HAS_STOP_DETECT
kClearFlags = kI2C_ArbitrationLostFlag | kI2C_IntPendingFlag | kI2C_StopDetectFlag,
kIrqFlags = kI2C_GlobalInterruptEnable | kI2C_StopDetectInterruptEnable,
#else
kClearFlags = kI2C_ArbitrationLostFlag | kI2C_IntPendingFlag,
kIrqFlags = kI2C_GlobalInterruptEnable,
#endif

};

只看该作者 · 2018-9-16 23:02

const uint16_t s_i2cDividerTable[] = {20, 22, 24, 26, 28, 30, 34, 40, 28, 32, 36, 40,  44,
                                    48, 56, 68, 48, 56, 64, 72, 80, 88, 104,  128,  80,  96,
                                    112,  128,  144,  160,  192,  240,  160,  192,  224,  256,  288,  320, 384,
                                    480,  320,  384,  448,  512,  576,  640,  768,  960,  640,  768,  896, 1024,
                                    1152, 1280, 1536, 1920, 1280, 1536, 1792, 2048, 2304, 2560, 3072, 3840};

只看该作者 · 2018-9-16 23:09

uint32_t I2C_GetInstance(I2C_Type *base)
{
uint32_t instance;

/* Find the instance index from base address mappings. */
for (instance = 0; instance < FSL_FEATURE_SOC_I2C_COUNT; instance++)
{
      if (s_i2cBases[instance] == base)
      {
         break;
      }
}

assert(instance < FSL_FEATURE_SOC_I2C_COUNT);

return instance;
}

只看该作者 · 2018-9-16 23:10

static status_t I2C_InitTransferStateMachine(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)
{
status_t result = kStatus_Success;
i2c_direction_t direction = xfer->direction;
uint16_t timeout = UINT16_MAX;

/* Initialize the handle transfer information. */
handle->transfer = *xfer;

/* Save total transfer size. */
handle->transferSize = xfer->dataSize;

/* Initial transfer state. */
if (handle->transfer.subaddressSize > 0)
{
      handle->state = kSendCommandState;
      if (xfer->direction == kI2C_Read)
      {
         direction = kI2C_Write;
      }
}
else
{
      handle->state = kCheckAddressState;
}

/* Wait until the data register is ready for transmit. */
while ((!(base->S & kI2C_TransferCompleteFlag)) && (--timeout))
{
}

/* Failed to start the transfer. */
if (timeout == 0)
{
      return kStatus_I2C_Timeout;
}

/* Clear all status before transfer. */
I2C_MasterClearStatusFlags(base, kClearFlags);

/* If repeated start is requested, send repeated start. */
if (handle->transfer.flags & kI2C_TransferRepeatedStartFlag)
{
      result = I2C_MasterRepeatedStart(base, handle->transfer.slaveAddress, direction);
}
else /* For normal transfer, send start. */
{
      result = I2C_MasterStart(base, handle->transfer.slaveAddress, direction);
}

return result;
}

只看该作者 · 2018-9-16 23:11

static status_t I2C_CheckAndClearError(I2C_Type *base, uint32_t status)
{
status_t result = kStatus_Success;

/* Check arbitration lost. */
if (status & kI2C_ArbitrationLostFlag)
{
      /* Clear arbitration lost flag. */
      base->S = kI2C_ArbitrationLostFlag;
      result = kStatus_I2C_ArbitrationLost;
}
/* Check NAK */
else if (status & kI2C_ReceiveNakFlag)
{
      result = kStatus_I2C_Nak;
}
else
{
}

return result;
}

只看该作者 · 2018-9-16 23:12

static status_t I2C_MasterTransferRunStateMachine(I2C_Type *base, i2c_master_handle_t *handle, bool *isDone)
{
status_t result = kStatus_Success;
uint32_t statusFlags = base->S;
*isDone = false;
volatile uint8_t dummy = 0;
bool ignoreNak = ((handle->state == kSendDataState) && (handle->transfer.dataSize == 0U)) ||
                  ((handle->state == kReceiveDataState) && (handle->transfer.dataSize == 1U));

/* Add this to avoid build warning. */
dummy++;

/* Check & clear error flags. */
result = I2C_CheckAndClearError(base, statusFlags);

/* Ignore Nak when it's appeared for last byte. */
if ((result == kStatus_I2C_Nak) && ignoreNak)
{
      result = kStatus_Success;
}

if (result)
{
      return result;
}

/* Handle Check address state to check the slave address is Acked in slave
   probe application. */
if (handle->state == kCheckAddressState)
{
      if (statusFlags & kI2C_ReceiveNakFlag)
      {
         return kStatus_I2C_Nak;
      }
      else
      {
         if (handle->transfer.direction == kI2C_Write)
         {
            /* Next state, send data. */
            handle->state = kSendDataState;
         }
         else
         {
            /* Next state, receive data begin. */
            handle->state = kReceiveDataBeginState;
         }
      }
}

/* Run state machine. */
switch (handle->state)
{
      /* Send I2C command. */
      case kSendCommandState:
         if (handle->transfer.subaddressSize)
         {
            handle->transfer.subaddressSize--;
            base->D = ((handle->transfer.subaddress) >> (8 * handle->transfer.subaddressSize));
         }
         else
         {
            if (handle->transfer.direction == kI2C_Write)
            {
                  /* Next state, send data. */
                  handle->state = kSendDataState;

                  /* Send first byte of data. */
                  if (handle->transfer.dataSize > 0)
                  {
                     base->D = *handle->transfer.data;
                     handle->transfer.data++;
                     handle->transfer.dataSize--;
                  }
            }
            else
            {
                  /* Send repeated start and slave address. */
                  result = I2C_MasterRepeatedStart(base, handle->transfer.slaveAddress, kI2C_Read);

                  /* Next state, receive data begin. */
                  handle->state = kReceiveDataBeginState;
            }
         }
         break;

      /* Send I2C data. */
      case kSendDataState:
         /* Send one byte of data. */
         if (handle->transfer.dataSize > 0)
         {
            base->D = *handle->transfer.data;
            handle->transfer.data++;
            handle->transfer.dataSize--;
         }
         else
         {
            *isDone = true;
         }
         break;

      /* Start I2C data receive. */
      case kReceiveDataBeginState:
         base->C1 &= ~(I2C_C1_TX_MASK | I2C_C1_TXAK_MASK);

         /* Send nak at the last receive byte. */
         if (handle->transfer.dataSize == 1)
         {
            base->C1 |= I2C_C1_TXAK_MASK;
         }

         /* Read dummy to release the bus. */
         dummy = base->D;

         /* Next state, receive data. */
         handle->state = kReceiveDataState;
         break;

      /* Receive I2C data. */
      case kReceiveDataState:
         /* Receive one byte of data. */
         if (handle->transfer.dataSize--)
         {
            if (handle->transfer.dataSize == 0)
            {
                  *isDone = true;

                  /* Send stop if kI2C_TransferNoStop is not asserted. */
                  if (!(handle->transfer.flags & kI2C_TransferNoStopFlag))
                  {
                     result = I2C_MasterStop(base);
                  }
            }

            /* Send NAK at the last receive byte. */
            if (handle->transfer.dataSize == 1)
            {
                  base->C1 |= I2C_C1_TXAK_MASK;
            }

            /* Read the data byte into the transfer buffer. */
            *handle->transfer.data = base->D;
            handle->transfer.data++;
         }
         break;

      default:
         break;
}

return result;
}

只看该作者 · 2018-9-16 23:12

static void I2C_TransferCommonIRQHandler(I2C_Type *base, void *handle)
{
/* Check if master interrupt. */
if ((base->S & kI2C_ArbitrationLostFlag) || (base->C1 & I2C_C1_MST_MASK))
{
s_i2cMasterIsr(base, handle);
}
else
{
s_i2cSlaveIsr(base, handle);
}
}

只看该作者 · 2018-9-16 23:13

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)
{
assert(masterConfig && srcClock_Hz);

/* Temporary register for filter read. */
uint8_t fltReg;
#if defined(FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION) && FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION
uint8_t c2Reg;
#endif

/* Enable I2C clock. */
CLOCK_EnableClock(s_i2cClocks[I2C_GetInstance(base)]);

/* Disable I2C prior to configuring it. */
base->C1 &= ~(I2C_C1_IICEN_MASK);

/* Clear all flags. */
I2C_MasterClearStatusFlags(base, kClearFlags);

/* Configure baud rate. */
I2C_MasterSetBaudRate(base, masterConfig->baudRate_Bps, srcClock_Hz);

#if defined(FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION) && FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION
/* Configure high drive feature. */
c2Reg = base->C2;
c2Reg &= ~(I2C_C2_HDRS_MASK);
c2Reg |= I2C_C2_HDRS(masterConfig->enableHighDrive);
base->C2 = c2Reg;
#endif

/* Read out the FLT register. */
fltReg = base->FLT;

#if defined(FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF) && FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF
/* Configure the stop / hold enable. */
fltReg &= ~(I2C_FLT_SHEN_MASK);
fltReg |= I2C_FLT_SHEN(masterConfig->enableStopHold);
#endif

/* Configure the glitch filter value. */
fltReg &= ~(I2C_FLT_FLT_MASK);
fltReg |= I2C_FLT_FLT(masterConfig->glitchFilterWidth);

/* Write the register value back to the filter register. */
base->FLT = fltReg;

/* Enable the I2C peripheral based on the configuration. */
base->C1 = I2C_C1_IICEN(masterConfig->enableMaster);
}

只看该作者 · 2018-9-16 23:14

void I2C_MasterDeinit(I2C_Type *base)
{
/* Disable I2C module. */
I2C_Enable(base, false);

/* Disable I2C clock. */
CLOCK_DisableClock(s_i2cClocks[I2C_GetInstance(base)]);
}

只看该作者 · 2018-9-16 23:14

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)
{
assert(masterConfig);

/* Default baud rate at 100kbps. */
masterConfig->baudRate_Bps = 100000U;

/* Default pin high drive is disabled. */
#if defined(FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION) && FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION
masterConfig->enableHighDrive = false;
#endif

/* Default stop hold enable is disabled. */
#if defined(FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF) && FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF
masterConfig->enableStopHold = false;
#endif

/* Default glitch filter value is no filter. */
masterConfig->glitchFilterWidth = 0U;

/* Enable the I2C peripheral. */
masterConfig->enableMaster = true;
}

只看该作者 · 2018-9-16 23:17

void I2C_EnableInterrupts(I2C_Type *base, uint32_t mask)
{
if (mask & kI2C_GlobalInterruptEnable)
{
      base->C1 |= I2C_C1_IICIE_MASK;
}

#if defined(FSL_FEATURE_I2C_HAS_STOP_DETECT) && FSL_FEATURE_I2C_HAS_STOP_DETECT
if (mask & kI2C_StopDetectInterruptEnable)
{
      base->FLT |= I2C_FLT_STOPIE_MASK;
}
#endif /* FSL_FEATURE_I2C_HAS_STOP_DETECT */

#if defined(FSL_FEATURE_I2C_HAS_START_STOP_DETECT) && FSL_FEATURE_I2C_HAS_START_STOP_DETECT
if (mask & kI2C_StartStopDetectInterruptEnable)
{
      base->FLT |= I2C_FLT_SSIE_MASK;
}
#endif /* FSL_FEATURE_I2C_HAS_START_STOP_DETECT */
}

只看该作者 · 2018-9-16 23:17

void I2C_DisableInterrupts(I2C_Type *base, uint32_t mask)
{
if (mask & kI2C_GlobalInterruptEnable)
{
      base->C1 &= ~I2C_C1_IICIE_MASK;
}

#if defined(FSL_FEATURE_I2C_HAS_STOP_DETECT) && FSL_FEATURE_I2C_HAS_STOP_DETECT
if (mask & kI2C_StopDetectInterruptEnable)
{
      base->FLT &= ~I2C_FLT_STOPIE_MASK;
}
#endif /* FSL_FEATURE_I2C_HAS_STOP_DETECT */

#if defined(FSL_FEATURE_I2C_HAS_START_STOP_DETECT) && FSL_FEATURE_I2C_HAS_START_STOP_DETECT
if (mask & kI2C_StartStopDetectInterruptEnable)
{
      base->FLT &= ~I2C_FLT_SSIE_MASK;
}
#endif /* FSL_FEATURE_I2C_HAS_START_STOP_DETECT */
}

只看该作者 · 2018-9-16 23:17

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
{
uint32_t multiplier;
uint32_t computedRate;
uint32_t absError;
uint32_t bestError = UINT32_MAX;
uint32_t bestMult = 0u;
uint32_t bestIcr = 0u;
uint8_t mult;
uint8_t i;

/* Search for the settings with the lowest error. Mult is the MULT field of the I2C_F register,
   * and ranges from 0-2. It selects the multiplier factor for the divider. */
for (mult = 0u; (mult <= 2u) && (bestError != 0); ++mult)
{
      multiplier = 1u << mult;

      /* Scan table to find best match. */
      for (i = 0u; i < sizeof(s_i2cDividerTable) / sizeof(uint16_t); ++i)
      {
         computedRate = srcClock_Hz / (multiplier * s_i2cDividerTable[i]);
         absError = baudRate_Bps > computedRate ? (baudRate_Bps - computedRate) : (computedRate - baudRate_Bps);

         if (absError < bestError)
         {
            bestMult = mult;
            bestIcr = i;
            bestError = absError;

            /* If the error is 0, then we can stop searching because we won't find a better match. */
            if (absError == 0)
            {
                  break;
            }
         }
      }
}

/* Set frequency register based on best settings. */
base->F = I2C_F_MULT(bestMult) | I2C_F_ICR(bestIcr);
}

只看该作者 · 2018-9-16 23:18

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)
{
status_t result = kStatus_Success;
uint32_t statusFlags = I2C_MasterGetStatusFlags(base);

/* Return an error if the bus is already in use. */
if (statusFlags & kI2C_BusBusyFlag)
{
      result = kStatus_I2C_Busy;
}
else
{
      /* Send the START signal. */
      base->C1 |= I2C_C1_MST_MASK | I2C_C1_TX_MASK;

#if defined(FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING) && FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING
      while (!(base->S2 & I2C_S2_EMPTY_MASK))
      {
      }
#endif /* FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING */

      base->D = (((uint32_t)address) << 1U | ((direction == kI2C_Read) ? 1U : 0U));
}

return result;
}

只看该作者 · 2018-9-16 23:19

status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)
{
status_t result = kStatus_Success;
uint8_t savedMult;
uint32_t statusFlags = I2C_MasterGetStatusFlags(base);
uint8_t timeDelay = 6;

/* Return an error if the bus is already in use, but not by us. */
if ((statusFlags & kI2C_BusBusyFlag) && ((base->C1 & I2C_C1_MST_MASK) == 0))
{
      result = kStatus_I2C_Busy;
}
else
{
      savedMult = base->F;
      base->F = savedMult & (~I2C_F_MULT_MASK);

      /* We are already in a transfer, so send a repeated start. */
      base->C1 |= I2C_C1_RSTA_MASK;

      /* Restore the multiplier factor. */
      base->F = savedMult;

      /* Add some delay to wait the Re-Start signal. */
      while (timeDelay--)
      {
         __NOP();
      }

#if defined(FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING) && FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING
      while (!(base->S2 & I2C_S2_EMPTY_MASK))
      {
      }
#endif /* FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING */

      base->D = (((uint32_t)address) << 1U | ((direction == kI2C_Read) ? 1U : 0U));
}

return result;
}

只看该作者 · 2018-9-16 23:20

status_t I2C_MasterStop(I2C_Type *base)
{
status_t result = kStatus_Success;
uint16_t timeout = UINT16_MAX;

/* Issue the STOP command on the bus. */
base->C1 &= ~(I2C_C1_MST_MASK | I2C_C1_TX_MASK | I2C_C1_TXAK_MASK);

/* Wait until data transfer complete. */
while ((base->S & kI2C_BusBusyFlag) && (--timeout))
{
}

if (timeout == 0)
{
result = kStatus_I2C_Timeout;
}

return result;
}

只看该作者 · 2018-9-16 23:20

uint32_t I2C_MasterGetStatusFlags(I2C_Type *base)
{
uint32_t statusFlags = base->S;

#ifdef I2C_HAS_STOP_DETECT
/* Look up the STOPF bit from the filter register. */
if (base->FLT & I2C_FLT_STOPF_MASK)
{
statusFlags |= kI2C_StopDetectFlag;
}
#endif

#if defined(FSL_FEATURE_I2C_HAS_START_STOP_DETECT) && FSL_FEATURE_I2C_HAS_START_STOP_DETECT
/* Look up the STARTF bit from the filter register. */
if (base->FLT & I2C_FLT_STARTF_MASK)
{
statusFlags |= kI2C_StartDetectFlag;
}
#endif /* FSL_FEATURE_I2C_HAS_START_STOP_DETECT */

return statusFlags;
}

只看该作者 · 2018-9-16 23:21

status_t I2C_MasterWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)
{
status_t result = kStatus_Success;
uint8_t statusFlags = 0;

/* Wait until the data register is ready for transmit. */
while (!(base->S & kI2C_TransferCompleteFlag))
{
}

/* Clear the IICIF flag. */
base->S = kI2C_IntPendingFlag;

/* Setup the I2C peripheral to transmit data. */
base->C1 |= I2C_C1_TX_MASK;

while (txSize--)
{
      /* Send a byte of data. */
      base->D = *txBuff++;

      /* Wait until data transfer complete. */
      while (!(base->S & kI2C_IntPendingFlag))
      {
      }

      statusFlags = base->S;

      /* Clear the IICIF flag. */
      base->S = kI2C_IntPendingFlag;

      /* Check if arbitration lost or no acknowledgement (NAK), return failure status. */
      if (statusFlags & kI2C_ArbitrationLostFlag)
      {
         base->S = kI2C_ArbitrationLostFlag;
         result = kStatus_I2C_ArbitrationLost;
      }

      if (statusFlags & kI2C_ReceiveNakFlag)
      {
         base->S = kI2C_ReceiveNakFlag;
         result = kStatus_I2C_Nak;
      }

      if (result != kStatus_Success)
      {
         /* Breaking out of the send loop. */
         break;
      }
}

return result;
}

只看该作者 · 2018-9-16 23:21

status_t I2C_MasterReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)
{
status_t result = kStatus_Success;
volatile uint8_t dummy = 0;

/* Add this to avoid build warning. */
dummy++;

/* Wait until the data register is ready for transmit. */
while (!(base->S & kI2C_TransferCompleteFlag))
{
}

/* Clear the IICIF flag. */
base->S = kI2C_IntPendingFlag;

/* Setup the I2C peripheral to receive data. */
base->C1 &= ~(I2C_C1_TX_MASK | I2C_C1_TXAK_MASK);

/* If rxSize equals 1, configure to send NAK. */
if (rxSize == 1)
{
      /* Issue NACK on read. */
      base->C1 |= I2C_C1_TXAK_MASK;
}

/* Do dummy read. */
dummy = base->D;

while ((rxSize--))
{
      /* Wait until data transfer complete. */
      while (!(base->S & kI2C_IntPendingFlag))
      {
      }

      /* Clear the IICIF flag. */
      base->S = kI2C_IntPendingFlag;

      /* Single byte use case. */
      if (rxSize == 0)
      {
         /* Read the final byte. */
         result = I2C_MasterStop(base);
      }

      if (rxSize == 1)
      {
         /* Issue NACK on read. */
         base->C1 |= I2C_C1_TXAK_MASK;
      }

      /* Read from the data register. */
      *rxBuff++ = base->D;
}

return result;
}