/**************************************************************************//**
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V3.00
* $Revision: 5 $
* $Date: 15/09/02 10:04a $
* [url=home.php?mod=space&uid=247401]@brief[/url] Show how to trigger ADC by timer.
* @note
* Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include "stdio.h"
#include "M451Series.h"
#define PLLCTL_SETTING CLK_PLLCTL_72MHz_HXT
#define PLL_CLOCK 72000000
/*---------------------------------------------------------------------------------------------------------*/
/* Define global variables and constants */
/*---------------------------------------------------------------------------------------------------------*/
volatile uint32_t g_u32AdcIntFlag, g_u32COVNUMFlag = 0;
/*---------------------------------------------------------------------------------------------------------*/
/* Define functions prototype */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void);
void EADC_FunctionTest(void);
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable HIRC clock (Internal RC 22.1184MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Wait for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Select HCLK clock source as HIRC and and HCLK source divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set PLL to Power-down mode and PLLSTB bit in CLK_STATUS register will be cleared by hardware.*/
CLK_DisablePLL();
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
/* Enable EADC module clock */
CLK_EnableModuleClock(EADC_MODULE);
/* EADC clock source is 72MHz, set divider to 8, ADC clock is 72/8 MHz */
CLK_SetModuleClock(EADC_MODULE, 0, CLK_CLKDIV0_EADC(8));
/* Enable Timer 0 module clock */
CLK_EnableModuleClock(TMR0_MODULE);
/* Select timer 0 module clock source as HXT */
CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_HXT, 0);
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PD multi-function pins for UART0 RXD and TXD */
SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);
SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);
/* Configure the GPB0 - GPB3 ADC analog input pins. */
SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB0MFP_Msk | SYS_GPB_MFPL_PB1MFP_Msk |
SYS_GPB_MFPL_PB2MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk);
SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB0MFP_EADC_CH0 | SYS_GPB_MFPL_PB1MFP_EADC_CH1 |
SYS_GPB_MFPL_PB2MFP_EADC_CH2 | SYS_GPB_MFPL_PB3MFP_EADC_CH3);
/* Disable the GPB0 - GPB3 digital input path to avoid the leakage current. */
GPIO_DISABLE_DIGITAL_PATH(PB, 0xF);
}
void UART0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
/* Reset UART module */
SYS_ResetModule(UART0_RST);
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
void TIMER0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init TIMER0 */
/*---------------------------------------------------------------------------------------------------------*/
/* Set timer0 periodic time-out period is 3us if timer clock is 12 MHz */
TIMER_SET_CMP_VALUE(TIMER0, 36);//TIMER0->CMP = 36;
/* Start timer counter in periodic mode and enable timer interrupt trigger EADC */
TIMER0->CTL = TIMER_PERIODIC_MODE | TIMER_CTL_TRGEADC_Msk;
}
/*---------------------------------------------------------------------------------------------------------*/
/* EADC function test */
/*---------------------------------------------------------------------------------------------------------*/
void EADC_FunctionTest()
{
uint8_t u8Option;
int32_t i32ConversionData[6] = {0};
printf("\n");
printf("+----------------------------------------------------------------------+\n");
printf("| Timer trigger mode test |\n");
printf("+----------------------------------------------------------------------+\n");
printf("\nIn this test, software will get 6 conversion result from the specified channel.\n");
while(1)
{
printf("Select input mode:\n");
printf(" [1] Single end input (channel 2 only)\n");
printf(" [2] Differential input (channel pair 1 only)\n");
printf(" Other keys: exit single mode test\n");
u8Option = getchar();
if(u8Option == '1')
{
/* Set the ADC internal sampling time, input mode as single-end and enable the A/D converter */
EADC_Open(EADC, EADC_CTL_DIFFEN_SINGLE_END);
EADC_SetInternalSampleTime(EADC, 6);
/* Configure the sample module 0 for analog input channel 2 and enable Timer0 trigger source */
EADC_ConfigSampleModule(EADC, 0, EADC_TIMER0_TRIGGER, 2);
/* Clear the A/D ADINT0 interrupt flag for safe */
EADC_CLR_INT_FLAG(EADC, 0x1);
/* Enable the sample module 0 interrupt. */
EADC_ENABLE_INT(EADC, 0x1);//Enable sample module A/D ADINT0 interrupt.
EADC_ENABLE_SAMPLE_MODULE_INT(EADC, 0, 0x1);//Enable sample module 0 interrupt.
NVIC_EnableIRQ(ADC00_IRQn);
printf("Conversion result of channel 2:\n");
/* Reset the ADC indicator and enable Timer0 counter */
g_u32AdcIntFlag = 0;
g_u32COVNUMFlag = 0;
TIMER_Start(TIMER0);
while(1)
{
/* Wait ADC interrupt (g_u32AdcIntFlag will be set at IRQ_Handler function) */
while(g_u32AdcIntFlag == 0);
/* Reset the EADC interrupt indicator */
g_u32AdcIntFlag = 0;
/* Get the conversion result of the sample module 0 */
i32ConversionData[g_u32COVNUMFlag - 1] = EADC_GET_CONV_DATA(EADC, 0);
if(g_u32COVNUMFlag > 6)
break;
}
/* Disable Timer0 counter */
TIMER_Stop(TIMER0);
/* Disable the ADINT0 interrupt */
EADC_DISABLE_INT(EADC, 0x1);
for(g_u32COVNUMFlag = 0; (g_u32COVNUMFlag) < 6; g_u32COVNUMFlag++)
printf(" 0x%X (%d)\n", i32ConversionData[g_u32COVNUMFlag], i32ConversionData[g_u32COVNUMFlag]);
}
else if(u8Option == '2')
{
/* Set the ADC internal sampling time, input mode as differential and enable the A/D converter */
EADC_Open(EADC, EADC_CTL_DIFFEN_DIFFERENTIAL);
EADC_SetInternalSampleTime(EADC, 6);
/* Configure the sample module 0 for analog input channel 2 and enable Timer0 trigger source */
EADC_ConfigSampleModule(EADC, 0, EADC_TIMER0_TRIGGER, 2);
/* Clear the A/D ADINT0 interrupt flag for safe */
EADC_CLR_INT_FLAG(EADC, 0x1);
/* Enable the sample module 0 interrupt. */
EADC_ENABLE_INT(EADC, 0x1);//Enable sample module A/D ADINT0 interrupt.
EADC_ENABLE_SAMPLE_MODULE_INT(EADC, 0, 0x1);//Enable sample module 0 interrupt.
NVIC_EnableIRQ(ADC00_IRQn);
printf("Conversion result of channel pair 1:\n");
/* Reset the EADC indicator and enable Timer0 counter */
g_u32AdcIntFlag = 0;
g_u32COVNUMFlag = 0;
TIMER_Start(TIMER0);
while(1)
{
/* Wait ADC interrupt (g_u32AdcIntFlag will be set at IRQ_Handler function) */
while(g_u32AdcIntFlag == 0);
/* Reset the ADC interrupt indicator */
g_u32AdcIntFlag = 0;
/* Get the conversion result of the sample module 0 */
i32ConversionData[g_u32COVNUMFlag - 1] = EADC_GET_CONV_DATA(EADC, 0);
if(g_u32COVNUMFlag > 6)
break;
}
/* Disable Timer0 counter */
TIMER_Stop(TIMER0);
/* Disable the ADINT0 interrupt */
EADC_DISABLE_INT(EADC, 0x1);
for(g_u32COVNUMFlag = 0; (g_u32COVNUMFlag) < 6; g_u32COVNUMFlag++)
printf(" 0x%X (%d)\n", i32ConversionData[g_u32COVNUMFlag], i32ConversionData[g_u32COVNUMFlag]);
}
else
return ;
}
}
/*---------------------------------------------------------------------------------------------------------*/
/* EADC interrupt handler */
/*---------------------------------------------------------------------------------------------------------*/
void ADC00_IRQHandler(void)
{
g_u32AdcIntFlag = 1;
g_u32COVNUMFlag++;
EADC_CLR_INT_FLAG(EADC, 0x1);/* Clear the A/D ADINT0 interrupt flag */
}
/*---------------------------------------------------------------------------------------------------------*/
/* Main Function */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
/* Init TIMER0 for EADC */
TIMER0_Init();
/*---------------------------------------------------------------------------------------------------------*/
/* SAMPLE CODE */
/*---------------------------------------------------------------------------------------------------------*/
printf("\nSystem clock rate: %d Hz", SystemCoreClock);
/* EADC function test */
EADC_FunctionTest();
/* Reset Timer0 module */
SYS_ResetModule(TMR0_RST);
/* Reset EADC module */
SYS_ResetModule(EADC_RST);
/* Disable Timer0 IP clock */
CLK_DisableModuleClock(TMR0_MODULE);
/* Disable EADC IP clock */
CLK_DisableModuleClock(EADC_MODULE);
/* Disable External Interrupt */
NVIC_DisableIRQ(ADC00_IRQn);
printf("Exit EADC sample code\n");
while(1);
}
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