标准SPI，Dual SPI和Qual SPI

只看该作者 · 2018-12-26 23:42

1. 标准SPI

标准SPI通常就称SPI，它是一种串行外设接口规范，有4根引脚信号：clk , cs, mosi, miso

2. Dual SPI

它只是针对SPI Flash而言，不是针对所有SPI外设。对于SPI Flash，全双工并不常用，因此扩展了mosi和miso的用法，让它们工作在半双工，用以加倍数据传输。也就是对于Dual SPI Flash，可以发送一个命令字节进入dual mode，这样mosi变成SIO0（serial io 0），mosi变成SIO1（serial io 1）,这样一个时钟周期内就能传输2个bit数据，加倍了数据传输

3. Qual SPI

与Dual SPI类似，也是针对SPI Flash，Qual SPI Flash增加了两根I/O线（SIO2,SIO3），目的是一个时钟内传输4个bit

所以对于SPI Flash，有标准spi flash，dual spi , qual spi 三种类型，分别对应3-wire, 4-wire, 6-wire，在相同clock下，线数越多，传输速率越高。

btw：spi flash一般为NOR Flash

只看该作者 · 2018-12-26 23:43

复制

/**************************************************************************//**

 * [url=home.php?mod=space&uid=288409]@file[/url]     main.c

 * [url=home.php?mod=space&uid=895143]@version[/url]  V2.0

 * $Revision: 6 $

 * $Date: 14/08/05 11:13a $

 * @brief

 *           Demonstrate how to communicate with an off-chip SPI slave device with Dual I/O mode and FIFO mode.

 *           This sample code needs to work with SPI_SlaveDualIOMode sample code.

 * @note

 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.

 *

 ******************************************************************************/

#include <stdio.h>

#include "NUC123.h"





#define TEST_COUNT 16



uint32_t g_au32SourceData[TEST_COUNT];

uint32_t g_au32DestinationData[TEST_COUNT];

volatile uint32_t g_u32TxDataCount;

volatile uint32_t g_u32RxDataCount;



/* Function prototype declaration */

void SYS_Init(void);

void SPI_Init(void);



/* ------------- */

/* Main function */

/* ------------- */

int main(void)

{

    uint32_t u32DataCount;



    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Lock protected registers */

    SYS_LockReg();



    /* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */

    UART_Open(UART0, 115200);



    /* Init SPI */

    SPI_Init();



    printf("\n\n");

    printf("+--------------------------------------------------------+\n");

    printf("|             SPI Master Mode Sample Code                |\n");

    printf("+--------------------------------------------------------+\n");

    printf("\n");

    printf("Configure SPI0 as a master.\n");

    printf("Bit length of a transaction: 32\n");

    printf("The I/O connection for SPI0:\n");

    printf("    SPI0_SS0 (PC.0)\n    SPI0_CLK (PC.1)\n");

    printf("    SPI0_MISO0 (PC.2)\n    SPI0_MOSI0 (PC.3)\n\n");

    printf("SPI controller will enable Dual I/O mode and FIFO mode, then transfer %d data to a off-chip slave device.\n", TEST_COUNT);

    printf("Afterward the SPI controller will receive %d data from the off-chip slave device.\n", TEST_COUNT);

    printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);

    printf("The SPI master configuration is ready.\n");



    for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)

    {

        /* Write the initial value to source buffer */

        g_au32SourceData[u32DataCount] = 0x00550000 + u32DataCount;

        /* Clear destination buffer */

        g_au32DestinationData[u32DataCount] = 0;

    }



    printf("Before starting the data transfer, make sure the slave device is ready.\n");

    printf("Press any key to start the Dual I/O output transfer.");

    getchar();

    printf("\n");



    /* Enable Dual I/O output mode */

    SPI_ENABLE_DUAL_OUTPUT_MODE(SPI0);

    /* Enable FIFO mode, set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */

    SPI_EnableFIFO(SPI0, 2, 2);

    SPI_EnableInt(SPI0, SPI_FIFO_TX_INT_MASK | SPI_FIFO_TIMEOUT_INT_MASK);

    g_u32TxDataCount = 0;

    g_u32RxDataCount = 0;

    NVIC_EnableIRQ(SPI0_IRQn);



    /* Wait for transfer done */

    while(g_u32RxDataCount < TEST_COUNT);



    /* Enable Dual I/O input mode */

    SPI_ENABLE_DUAL_INPUT_MODE(SPI0);

    printf("Dual I/O output transfer is done. Before starting the Dual I/O input transfer, make sure the slave device is ready.\n");

    printf("Press any key to start the Dual I/O input transfer.");

    getchar();

    printf("\n");

    

    g_u32TxDataCount = 0;

    g_u32RxDataCount = 0;

    SPI_EnableInt(SPI0, SPI_FIFO_TX_INT_MASK | SPI_FIFO_TIMEOUT_INT_MASK);

    

    /* Wait for transfer done */

    while(g_u32RxDataCount < TEST_COUNT);

    

    /* Print the received data */

    printf("Received data:\n");

    for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)

    {

        printf("%d:\t0x%X\n", u32DataCount, g_au32DestinationData[u32DataCount]);

    }

    /* Disable TX FIFO threshold interrupt and RX FIFO time-out interrupt */

    SPI_DisableInt(SPI0, SPI_FIFO_TX_INT_MASK | SPI_FIFO_TIMEOUT_INT_MASK);

    NVIC_DisableIRQ(SPI0_IRQn);

    

    printf("\n\nExit SPI driver sample code.\n");



    /* Disable SPI0 peripheral clock */

    SPI_Close(SPI0);

    while(1);

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/



    /* Enable XT1_OUT (PF0) and XT1_IN (PF1) */

    SYS->GPF_MFP |= SYS_GPF_MFP_PF0_XT1_OUT | SYS_GPF_MFP_PF1_XT1_IN;



    /* Enable external 12MHz XTAL */

    CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);



    /* Switch HCLK clock source to HXT and HCLK source divide 1 */

    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV_HCLK(1));



    /* Select HXT as the clock source of UART0 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));



    /* Select HCLK as the clock source of SPI0 */

    CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL1_SPI0_S_HCLK, MODULE_NoMsk);



    /* Enable UART peripheral clock */

    CLK_EnableModuleClock(UART0_MODULE);

    /* Enable SPI0 peripheral clock */

    CLK_EnableModuleClock(SPI0_MODULE);



    /* Update System Core Clock */

    /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CyclesPerUs automatically. */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PB multi-function pins for UART0 RXD and TXD */

    SYS->GPB_MFP = SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD;



    /* Setup SPI0 multi-function pins */

    SYS->GPC_MFP = SYS_GPC_MFP_PC0_SPI0_SS0 | SYS_GPC_MFP_PC1_SPI0_CLK | SYS_GPC_MFP_PC2_SPI0_MISO0 | SYS_GPC_MFP_PC3_SPI0_MOSI0;

    SYS->ALT_MFP = SYS_ALT_MFP_PC0_SPI0_SS0 | SYS_ALT_MFP_PC1_SPI0_CLK | SYS_ALT_MFP_PC2_SPI0_MISO0 | SYS_ALT_MFP_PC3_SPI0_MOSI0;

}



void SPI_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init SPI                                                                                                */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Configure SPI0 as a master, clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */

    /* Set IP clock divider. SPI clock rate = 2 MHz */

    SPI_Open(SPI0, SPI_MASTER, SPI_MODE_0, 32, 2000000);



    /* Enable the automatic hardware slave select function. Select the SPI0_SS0 pin and configure as low-active. */

    SPI_EnableAutoSS(SPI0, SPI_SS0, SPI_SS_ACTIVE_LOW);

}



void SPI0_IRQHandler(void)

{

    /* Check RX EMPTY flag */

    while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

    {

        /* Read RX FIFO */

        g_au32DestinationData[g_u32RxDataCount++] = SPI_READ_RX0(SPI0);

    }

    /* Check TX FULL flag and TX data count */

    while((SPI_GET_TX_FIFO_FULL_FLAG(SPI0) == 0) && (g_u32TxDataCount < TEST_COUNT))

    {

        /* Write to TX FIFO */

        SPI_WRITE_TX0(SPI0, g_au32SourceData[g_u32TxDataCount++]);

    }

    if(g_u32TxDataCount >= TEST_COUNT)

        SPI_DisableInt(SPI0, SPI_FIFO_TX_INT_MASK); /* Disable TX FIFO threshold interrupt */



    /* Check the RX FIFO time-out interrupt flag */

    if(SPI_GetIntFlag(SPI0, SPI_FIFO_TIMEOUT_INT_MASK))

    {

        /* If RX FIFO is not empty, read RX FIFO. */

        while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

            g_au32DestinationData[g_u32RxDataCount++] = SPI_READ_RX0(SPI0);

    }

}





/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/

只看该作者 · 2018-12-26 23:43

复制

/**************************************************************************//**

 * @file     main.c

 * @version  V2.0

 * $Revision: 6 $

 * $Date: 14/08/05 11:13a $

 * @brief

 *           Demonstrate how to communicate with an off-chip SPI master device with Dual I/O mode and FIFO mode.

 *           This sample code needs to work with SPI_MasterDualIOMode sample code.

 * @note

 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.

 *

 ******************************************************************************/

#include <stdio.h>

#include "NUC123.h"





#define TEST_COUNT 16



uint32_t g_au32SourceData[TEST_COUNT];

uint32_t g_au32DestinationData[TEST_COUNT];

volatile uint32_t g_u32TxDataCount;

volatile uint32_t g_u32RxDataCount;



/* Function prototype declaration */

void SYS_Init(void);

void SPI_Init(void);



/* ------------- */

/* Main function */

/* ------------- */

int main(void)

{

    volatile uint32_t u32TxDataCount, u32RxDataCount;



    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Lock protected registers */

    SYS_LockReg();



    /* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */

    UART_Open(UART0, 115200);



    /* Init SPI */

    SPI_Init();

    /* Enable Dual I/O input mode */

    SPI_ENABLE_DUAL_INPUT_MODE(SPI0);

    /* Enable FIFO mode and set FIFO threshold. */

    SPI_EnableFIFO(SPI0, 2, 2);



    printf("\n\n");

    printf("+-----------------------------------------------------+\n");

    printf("|           SPI Slave Mode Sample Code                |\n");

    printf("+-----------------------------------------------------+\n");

    printf("\n");

    printf("Configure SPI0 as a slave.\n");

    printf("Bit length of a transaction: 32\n");

    printf("The I/O connection for SPI0:\n");

    printf("    SPI0_SS0 (PC.0)\n    SPI0_CLK (PC.1)\n");

    printf("    SPI0_MISO0 (PC.2)\n    SPI0_MOSI0 (PC.3)\n\n");

    printf("SPI controller will enable Dual I/O mode and FIFO mode.\n");

    printf("In the first stage, the SPI controller will receive %d data from a off-chip master device.\n", TEST_COUNT);

    printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);

    printf("In the second stage, the SPI controller will transfer %d data to the off-chip master device.\n", TEST_COUNT);

    

    for(u32TxDataCount = 0; u32TxDataCount < TEST_COUNT; u32TxDataCount++)

    {

        /* Write the initial value to source buffer */

        g_au32SourceData[u32TxDataCount] = 0x00AA0000 + u32TxDataCount;

        /* Clear destination buffer */

        g_au32DestinationData[u32TxDataCount] = 0;

    }



    u32RxDataCount = 0;

    printf("< Stage 1 >\n");

    printf("Press any key to start the Dual I/O input transfer if the master device configuration is ready.");

    getchar();

    printf("\n");



    /* Access RX FIFO */

    while(u32RxDataCount < TEST_COUNT)

    {

        /* Check RX EMPTY flag */

        if(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

            g_au32DestinationData[u32RxDataCount++] = SPI_READ_RX0(SPI0); /* Read RX FIFO */

    }



    /* Print the received data */

    printf("Received data:\n");

    for(u32RxDataCount = 0; u32RxDataCount < TEST_COUNT; u32RxDataCount++)

    {

        printf("%d:\t0x%X\n", u32RxDataCount, g_au32DestinationData[u32RxDataCount]);

    }



    /* Enable Dual I/O output mode */

    SPI_ENABLE_DUAL_OUTPUT_MODE(SPI0);

    u32TxDataCount = 0;

    u32RxDataCount = 0;

    printf("< Stage 2 >\n");

    printf("Enable Dual I/O output mode. Slave is ready to transfer.\n");

    

    /* Access TX and RX FIFO */

    while(u32RxDataCount < TEST_COUNT)

    {

        /* Check TX FULL flag and TX data count */

        if((SPI_GET_TX_FIFO_FULL_FLAG(SPI0) == 0) && (u32TxDataCount < TEST_COUNT))

            SPI_WRITE_TX0(SPI0, g_au32SourceData[u32TxDataCount++]); /* Write to TX FIFO */

        /* Check RX EMPTY flag */

        if(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

            g_au32DestinationData[u32RxDataCount++] = SPI_READ_RX0(SPI0); /* Read RX FIFO */

    }

    

    

    printf("\n\nExit SPI driver sample code.\n");



    /* Disable SPI0 peripheral clock */

    SPI_Close(SPI0);

    while(1);

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/



    /* Enable XT1_OUT (PF0) and XT1_IN (PF1) */

    SYS->GPF_MFP |= SYS_GPF_MFP_PF0_XT1_OUT | SYS_GPF_MFP_PF1_XT1_IN;



    /* Enable external 12 MHz XTAL */

    CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);



    /* Switch HCLK clock source to HXT and HCLK source divide 1 */

    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV_HCLK(1));



    /* Select HXT as the clock source of UART0 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));



    /* Select HCLK as the clock source of SPI0 */

    CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL1_SPI0_S_HCLK, MODULE_NoMsk);



    /* Enable UART peripheral clock */

    CLK_EnableModuleClock(UART0_MODULE);

    /* Enable SPI0 peripheral clock */

    CLK_EnableModuleClock(SPI0_MODULE);



    /* Update System Core Clock */

    /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CyclesPerUs automatically. */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PB multi-function pins for UART0 RXD and TXD */

    SYS->GPB_MFP = SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD;



    /* Setup SPI0 multi-function pins */

    SYS->GPC_MFP = SYS_GPC_MFP_PC0_SPI0_SS0 | SYS_GPC_MFP_PC1_SPI0_CLK | SYS_GPC_MFP_PC2_SPI0_MISO0 | SYS_GPC_MFP_PC3_SPI0_MOSI0;

    SYS->ALT_MFP = SYS_ALT_MFP_PC0_SPI0_SS0 | SYS_ALT_MFP_PC1_SPI0_CLK | SYS_ALT_MFP_PC2_SPI0_MISO0 | SYS_ALT_MFP_PC3_SPI0_MOSI0;

}



void SPI_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init SPI                                                                                                */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Configure SPI0 as a slave, clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */

    /* Configure SPI0 as a low level active device. SPI peripheral clock rate is equal to system clock rate. */

    SPI_Open(SPI0, SPI_SLAVE, SPI_MODE_0, 32, NULL);

}



/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/