M051特性总结

1万 · 2020-2-18 18:02

M051.pdf (280.35 KB)

1万 · 2020-2-18 18:03

Core
– ARM® Cortex™-M0 core running up to 50 MHz
– One 24-bit system timer
– Low-power sleep mode
– Single-cycle 32-bit hardware multiplier
– NVIC for 32 interrupt inputs, each with 4-levels of priority
– Serial Wire Debug (SWD) interface and 2 watchpoints/4 breakpoints

1万 · 2020-2-18 18:03

Memory
– 8K/16K/32K/64K bytes program memory (APROM)
– 4K bytes data memory (DataFlash)
– 4K bytes loader memory (LDROM)
– 4K bytes embedded SRAM
– In System Programming (ISP) update APROM
– 2 wire In Circuit Programming (ICP) update APROM or LDROM or DataFlash
– Fast parallel programming mode to update APROM or LDROM or DataFlash

1万 · 2020-2-18 18:04

Clock Control
– Programmable system clock source
– 4 ~ 24 MHz external crystal input
– 22.1184 MHz internal oscillator (trimmed to 1% accuracy at room temp.)
– 10 kHz internal low-power oscillator for Watchdog timer and Wake-up in sleep mode
– PLL allows CPU operation up to the maximum 50 MHz
◆

1万 · 2020-2-18 18:04

Timers
– 4 sets 32-bit timers, one 8-bit pre-scale counter
with 24-bit up-timer for each timer
– Independent clock source for each timer
– 24-bit timer value is readable through TDR (Timer Data Register)
– One-shot, periodic and toggle operation modes
– Event counter function
– External capture/reset counter function equivalent to 8051 Timer2

1万 · 2020-2-18 18:04

PWM
– Four 16-bit PWM generators with eight PWM outputs or four
complementary paired PWM outputs
– Individual clock source, clock divider, 8-bit pre-scale and Dead-Zone generator for each PWM generator
– PWM interrupt synchronized to PWM period
– 16-bit digital capture timers (shared with PWM timers) with rising/falling capture inputs
– Capture interrupt, edge or center alignment

1万 · 2020-2-18 18:05

ADC
– 12-bit SAR ADC with 760 Ksps
– Up to 8-ch single-ended input or 4-ch differential input
– Single mode/ burst mode/ single-cycle scan mode/continuous scan mode
– 2’ complement/ un-signed format in differential mode conversion result
– Each channel with an individual result register
– Conversion value monitoring (or comparison) for threshold oltage detection
– Conversion can be started either by software trigger or external pin trigger

1万 · 2020-2-18 18:05

Communication Interface
– 2 UARTs, up to 1 Mbps with flow control
– 2 SPIs, clock up to 16 MHz (Master at 5V), 10 MHz (Slave at 5V)
– 1 I2C
– IrDA (SIR) and RS485, LIN

1万 · 2020-2-18 18:06

Analog Comparator
– 2 comparator analog modules
– External input or internal band-gap voltage selectable atnegative node
– Interrupt when compare result change
– Power down wake-up

1万 · 2020-2-18 18:06

Wake-Up Sources
– Watchdog timer, all GPIOs, UARTs, Comparators, BOD

1万 · 2020-2-18 18:06

EBI Bus
– Accessible space: 64K bytes in 8-bit mode or 128K bytes in 16-bit mode
– 8-bit/16-bit data width
– Byte-write in 16-bit data width

1万 · 2020-2-18 18:07

Brown-out Detector
– With 4 levels: 4.5V / 3.8V / 2.7V / 2.2V
– Brown-out interrupt and reset option

1万 · 2020-2-18 18:07

GPIOs
– Up to 40 general-purpose I/O (GPIO) pins
– Four I/O modes:
■ Quasi bi-direction
■ Push-Pull output
■ Open-Drain output
■ Input only with high impendence
– TTL/Schmitt trigger input selectable
– All GPIO pins can be configured as interrupt source with edge/level setting

1万 · 2020-2-18 18:07

Wide Operating Voltage Range
– 2.5V to 5.5V
Operating Temperature
– - 40°C ~ 85°C
◆ Packages (RoHS)
– QFN33 (4x4mm)
– QFN33 (5x5mm)
– LQFP48 (7x7mm)

只看该作者 · 2020-2-18 20:09

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