void ADF4350Init_1(void)
{
unsigned char buf[4] = {0, 0, 0, 0};
buf[3] = 0x00;
buf[2] = 0x58;
buf[1] = 0x00; //write communication register 0x00580005 to control the progress
buf[0] = 0x05; //to write Register 5 to set digital lock detector
Adf1(4, buf);
buf[3] = 0x00;
buf[2] = 0x90; //(DB23=1)The signal is taken from the VCO directly;(DB22-20:4H)the RF divider is 16;(DB19-12:50H)R is 80
buf[1] = 0x80; //(DB11=0)VCO powerd up;
buf[0] = 0x24; //(DB5=1)RF output is enabled;(DB4-3=3H)Output power level is 5
Adf1(4, buf);
buf[3] = 0x00;
buf[2] = 0x00;
buf[1] = 0x04; //(DB14-3:96H)clock divider value is 150.
buf[0] = 0xB3;
Adf1(4, buf);
buf[3] = 0x18;
buf[2] = 0x02; //(DB6=1)set PD polarity is positive;(DB7=1)LDP is 6nS;
buf[1] = 0x8f; //(DB8=0)enable fractional-N digital lock detect;
buf[0] = 0x42; //(DB12-9:7H)set Icp 2.50 mA;
Adf1(4, buf); //(DB23-14:1H)R counter is 1
buf[3] = 0x08;
buf[2] = 0x00;
buf[1] = 0x80; //(DB14-3:6H)MOD counter is 6;
buf[0] = 0x11; //(DB26-15:6H)PHASE word is 1,neither the phase resync
Adf1(4, buf); //nor the spurious optimization functions are being used
//(DB27=1)prescaler value is 8/9
buf[3] = 0x07;
buf[2] = 0x16;
buf[1] = 0x00;
buf[0] = 0x00; //(DB14-3:0H)FRAC value is 0;
Adf1(4, buf); //(DB30-15:140H)INT value is 320;
}
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