学习，请问：在设计规则检查时出现的错误，应该怎样处理。检查连线没问题。
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between Small Component Y3(7520mil,5860mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 1
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between Component USB2(7460mil,6740mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 3
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between DIP Component U7(4520mil,5240mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 5
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between Component S22(6260mil,2200mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 11
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between DIP Component S1(2860mil,6160mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 32
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between SMT Small Component R23(3220mil,3940mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 35
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between DIP Component PDIUSBD12(7300mil,2860mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 64
Class Document Source Message Time Date No.
[Room Definition Violation] PCB1.PcbDoc Advanced PCB Between SIP Component P9(5380mil,4080mil) on Top Layer and Room SHEET1 (Bounding Region = (10555mil, 1295mil, 12555mil, 2295mil) (InComponentClass('SHEET1')) 上午 10:06:31 2013-11-11 66
Class Document Source Message Time Date No.
[Un-Routed Net Constraint Violation] PCB1.PcbDoc Advanced PCB Net P3.0 is broken into 2 sub-nets. Routed To 85.71% 上午 10:06:31 2013-11-11 126
Class Document Source Message Time Date No.
[Un-Routed Net Constraint Violation] PCB1.PcbDoc Advanced PCB Net H is broken into 2 sub-nets. Routed To 83.33% 上午 10:06:31 2013-11-11 127
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