always@(negedge ENA or negedge RST_B)
begin
if(!RST_B)
ADDR<=0;
else
ADDR<=ADD;
end
reg[4:0] CNT; //ENA信号时间滤波
reg[4:0]CNT_N;
reg EN_FLAG; //ENA有效信号
reg EN_FLAG_N;
always@(posedge SYSCLK or negedge RST_B)
begin
if(!RST_B)
CNT<=0;
else
CNT<=CNT_N;
end
always@(*)
begin
if(CNT=='d10)
CNT_N<=0;
else if(!ENA)
CNT_N<=CNT+1'b1;
else if(ENA)
CNT_N<=0;
else
CNT_N<=CNT;
end
always@(posedge SYSCLK or negedge RST_B)
begin
if(!RST_B)
EN_FLAG<=0;
else
EN_FLAG<=EN_FLAG_N;
end
always@(*)
begin
if(ENA)
EN_FLAG_N<=0;
else if(CNT=='d10)
EN_FLAG_N<=1'b1;
else
EN_FLAG_N<=EN_FLAG;
end
always@(posedge SYSCLK or negedge RST_B)
begin
if(!RST_B)
WR<=IDLE;
else if((!IOW)&(IOR)&(EN_FLAG))
WR<=WRITE;
else if((IOW)&(!IOR)&(EN_FLAG))
WR<=READ;
else
WR<=IDLE;
end
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