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HC32F460 外部中断PC3

长江一道浪2022-07-28

本帖最后由 tyw 于 2022-7-28 18:09 编辑

我使用外部中断PC2成功了，但是PC3使用外部中断功能就是不行，我试了下PC3的读取外部输入功能也没错，那PC3是不是有什么特殊配置才能使用外部中断功能呀？这是我的代码，请大家看一看：
链接：https://pan.baidu.com/s/19XWBlQSQPHuDl7fzs9HOcg
提取码：n2bm

/** \file main.c
**
** \brief This sample demonstrates how to set GPIO as output function.
**
** - 2018-10-14  1.0  zhangxl first version for Device Driver Library of GPIO.
**
******************************************************************************/

/*******************************************************************************
* Include files
******************************************************************************/
#include "hc32_ddl.h"
#include "led.h"
#include "relay.h"
#include "usart.h"

#define  IO1_PORT       (PortC)
#define  IO1_PIN       (Pin02)
#define  IO1_ExtiCh          (ExtiCh02)
#define  IO1_EIR                   (INT_PORT_EIRQ2)

#define  IO2_PORT       (PortC)
#define  IO2_PIN       (Pin03)
#define  IO2_ExtiCh          (ExtiCh03)
#define  IO2_EIR                   (INT_PORT_EIRQ3)

static uint32_t u32ExtInt03Count = 0ul;

static void ClkInit(void);
void IO1_Callback(void);
void IO1_Init(void);
void IO2_Callback(void);
void IO2_Init(void);
void IO_Init(void);

/**
*******************************************************************************
** \brief ExtInt03 callback function
**
** \param  None
**
** \retval None
**
******************************************************************************/
void IO1_Callback(void)
{
if (Set == EXINT_Irq**Get(IO1_ExtiCh))
{
      //u32ExtInt03Count++;

      RLED1_TOGGLE();
            Ddl_Delay1ms(3000);
#ifdef  __PRINT_TO_TERMINAL
      printf("External interrupt 03(SW2) interrupt occurrence: %d\n", u32ExtInt03Count);
#endif
      /* clear int request flag */
      EXINT_Irq**Clr(IO1_ExtiCh);
}
}

void IO2_Callback(void)
{
if (Set == EXINT_Irq**Get(IO2_ExtiCh))
{
      //u32ExtInt03Count++;

      GLED3_TOGGLE();
            Ddl_Delay1ms(3000);
#ifdef  __PRINT_TO_TERMINAL
      printf("External interrupt 03(SW2) interrupt occurrence: %d\n", u32ExtInt03Count);
#endif
      /* clear int request flag */
      EXINT_Irq**Clr(IO2_ExtiCh);
}
}

/**
*******************************************************************************
** \brief SW2 init function
**
** \param  None
**
** \retval None
**
******************************************************************************/
void IO1_Init(void)
{
      /*�ⲿ�ж��ýṹ��*/
      stc_exint_config_t stcExtiConfig;
      /*irq��ýṹ��*/
      stc_irq_regi_conf_t stcIrqRegiConf;
      /*GPIO�ܽ��ýṹ��*/
      stc_port_init_t stcPortInit;

/* configuration structure initialization */
MEM_ZERO_STRUCT(stcExtiConfig);
MEM_ZERO_STRUCT(stcIrqRegiConf);
MEM_ZERO_STRUCT(stcPortInit);

      /*****�ܽų�ʼ��*****/
   /*�ⲿ�ж�ʹ��*/
stcPortInit.enExInt = Enable;
PORT_Init(IO1_PORT, IO1_PIN, &stcPortInit);


/*��ⲿ�жϺ�*/
      stcExtiConfig.enExitCh = IO1_ExtiCh;
/*��*/
stcExtiConfig.enFilterEn = Enable;
stcExtiConfig.enFltClk = Pclk3Div8;
/*�͵�ƽ��ʽ��*/
stcExtiConfig.enExtiLvl = ExIntLowLevel;
EXINT_Init(&stcExtiConfig);

      /*****�ⲿ�жϳ�ʼ��*****/
/*ѡ��ⲿ�жϺ�*/
stcIrqRegiConf.enIntSrc = IO1_EIR;
/* ע��жϵ�ַ to Vect.No.001 */
stcIrqRegiConf.enIRQn = Int001_IRQn;
/*��жϻص��*/
stcIrqRegiConf.pfnCallback = &IO1_Callback;
enIrqRegistration(&stcIrqRegiConf);

/* Clear pending */
NVIC_ClearPendingIRQ(stcIrqRegiConf.enIRQn);
/*��ж��ȼ�*/
NVIC_SetPriority(stcIrqRegiConf.enIRQn, DDL_IRQ_PRIORITY_15);
/*ʹ��NVIC*/
NVIC_EnableIRQ(stcIrqRegiConf.enIRQn);
}

void IO2_Init(void)
{
      /*�ⲿ�ж��ýṹ��*/
      stc_exint_config_t stcExtiConfig;
      /*irq��ýṹ��*/
      stc_irq_regi_conf_t stcIrqRegiConf;
      /*GPIO�ܽ��ýṹ��*/
      stc_port_init_t stcPortInit;

/* configuration structure initialization */
MEM_ZERO_STRUCT(stcExtiConfig);
MEM_ZERO_STRUCT(stcIrqRegiConf);
MEM_ZERO_STRUCT(stcPortInit);

   /*****GPIO�ܽų�ʼ��*****/
      /*�ⲿ�ж�ʹ��*/
stcPortInit.enExInt = Enable;
PORT_Init(IO2_PORT, IO2_PIN, &stcPortInit);

      /*****�ⲿ�жϳ�ʼ��*****/
/*��ⲿ�жϺ�*/
      stcExtiConfig.enExitCh = IO2_ExtiCh;
/*��˲��ʧ��*/
stcExtiConfig.enFilterEn = Enable;
      /*��˲��ʱ��ѡ��PCLK3/8*/
stcExtiConfig.enFltClk = Pclk3Div8;
/*�͵�ƽ��ʽ��*/
stcExtiConfig.enExtiLvl = ExIntLowLevel;
EXINT_Init(&stcExtiConfig);

      /*****�ж�ע��*****/
/*ѡ��ⲿ�жϺ�*/
stcIrqRegiConf.enIntSrc = IO2_EIR;
/* ע��ⲿ�жϵ�ַ to Vect.No.000 */
stcIrqRegiConf.enIRQn = Int000_IRQn;
/*��жϻص��*/
stcIrqRegiConf.pfnCallback = &IO2_Callback;
enIrqRegistration(&stcIrqRegiConf);

/* Clear pending */
NVIC_ClearPendingIRQ(stcIrqRegiConf.enIRQn);
/*��NVIC��ȼ�*/
NVIC_SetPriority(stcIrqRegiConf.enIRQn, DDL_IRQ_PRIORITY_15);
/*ʹ��NVIC*/
NVIC_EnableIRQ(stcIrqRegiConf.enIRQn);
}

/**
*******************************************************************************
** \brief  Main function of GPIO output
**
** \param  None
**
** \retval int32_t Return value, if needed
**
******************************************************************************/
int32_t main(void)
{

//  ClkInit();                //ϵͳʱ�ӳ�ʼ��
      LED_Init();                //LED��ʼ��
//  RELAY_Init();             //�̵��ʼ��
//  USART1_init(115200); //��ڳ�ʼ��Ϊ115200
//    IO1_Init();
      IO2_Init();
while(1)
{

         YLED2_TOGGLE();
   Ddl_Delay1ms(100);

};
}

/**
*******************************************************************************
** \brief Initialize Clock.
**
** \param [in] None
**
** \retval None
**
******************************************************************************/
static void ClkInit(void)
{
stc_clk_xtal_cfg_t stcXtalCfg;
stc_clk_mpll_cfg_t stcMpllCfg;
en_clk_sys_source_t  enSysClkSrc;
stc_clk_sysclk_cfg_t stcSysClkCfg;

MEM_ZERO_STRUCT(enSysClkSrc);
MEM_ZERO_STRUCT(stcSysClkCfg);
MEM_ZERO_STRUCT(stcXtalCfg);
MEM_ZERO_STRUCT(stcMpllCfg);

/* Set bus clk div. */
stcSysClkCfg.enHclkDiv  = ClkSysclkDiv1;
stcSysClkCfg.enExclkDiv = ClkSysclkDiv2;
stcSysClkCfg.enPclk0Div = ClkSysclkDiv1;
stcSysClkCfg.enPclk1Div = ClkSysclkDiv2;
stcSysClkCfg.enPclk2Div = ClkSysclkDiv4;
stcSysClkCfg.enPclk3Div = ClkSysclkDiv4;
stcSysClkCfg.enPclk4Div = ClkSysclkDiv2;
CLK_SysClkConfig(&stcSysClkCfg);

/* Switch system clock source to MPLL. */
/* Use Xtal as MPLL source. */
stcXtalCfg.enMode = ClkXtalModeOsc;
stcXtalCfg.enDrv = ClkXtalLowDrv;
stcXtalCfg.enFastStartup = Enable;
CLK_XtalConfig(&stcXtalCfg);
CLK_XtalCmd(Enable);

/* MPLL config. */
stcMpllCfg.pllmDiv = 1u; /* XTAL 8M / 1 */
stcMpllCfg.plln = 50u; /* 8M*50 = 400M */
stcMpllCfg.PllpDiv = 4u; /* MLLP = 100M */
stcMpllCfg.PllqDiv = 4u; /* MLLQ = 100M */
stcMpllCfg.PllrDiv = 4u; /* MLLR = 100M */
CLK_SetPllSource(ClkPllSrcXTAL);
CLK_MpllConfig(&stcMpllCfg);

/* flash read wait cycle setting */
EFM_Unlock();
EFM_SetLatency(EFM_LATENCY_4);
EFM_Lock();

/* Enable MPLL. */
CLK_MpllCmd(Enable);

/* Wait MPLL ready. */
while (Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
{
}

/* Switch system clock source to MPLL. */
CLK_SetSysClkSource(CLKSysSrcMPLL);
}

void IO_Init(void)
{
stc_port_init_t stcPortInit;

/* configuration structure initialization */
MEM_ZERO_STRUCT(stcPortInit);

      /*��ģʽ*/
stcPortInit.enPinMode = Pin_Mode_In;
      /*�ڲ��*/
stcPortInit.enPullUp = Enable;

PORT_Init(IO2_PORT, IO2_PIN, &stcPortInit);
}
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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