复位之后用的是外部时钟/2作为系统时钟的.
Clock Configuration Reset State
In reset state, the RCCU_CFR value is 8008h and The PCU_MDIVR and PCU_PDIVR
register values (FACT bits) are 0000h. Consequently, in reset state the clock configuration is
DIV2 = 1, CK2_16=1 and therefore MCLK, PCLK1 and PCLK2 operate at half the external
clock frequency CLK
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