KEAZ1284外部时钟配置为16M

/*****************************************************************************//*!

   +FUNCTION----------------------------------------------------------------

   * [url=home.php?mod=space&uid=42490]@function[/url] name: FEI_to_FEE

   *

   * [url=home.php?mod=space&uid=247401]@brief[/url] change clock from FEI mode to FEE mode and divide clock by 2

   *        

   * @param  none 

   *

   * [url=home.php?mod=space&uid=266161]@return[/url] none

   *

   * [url=home.php?mod=space&uid=72445]@[/url] Pass/ Fail criteria: none

   *****************************************************************************/

void FEI_to_FEE(void)

{

        /* assume external crystal is 8Mhz or 4MHz

         * 

         */

        /* enable OSC with high gain, high range and select oscillator output as OSCOUT

         * 

         */

        OSC_CR = OSC_CR_OSCEN_MASK

        | OSC_CR_OSCSTEN_MASK         /* enable stop */

#if defined(CRYST_HIGH_GAIN)

        |  OSC_CR_HGO_MASK                 /* Rs must be added and be large up to 200K */

#endif

#if  (EXT_CLK_CRYST >=4000)

        | OSC_CR_RANGE_MASK 

#endif        

        | OSC_CR_OSCOS_MASK;                /* for crystal only */

#if defined(IAR)        

        asm(

                "nop \n"

                "nop \n"

        );

#elif defined(__MWERKS__)

        asm{

                nop 

                nop

};        

#endif        

        /* wait for OSC to be initialized

         * 

         */

        while(!(OSC_CR & OSC_CR_OSCINIT_MASK));

        

        /* divide down external clock frequency to be within 31.25K to 39.0625K

         * 

         */

 

  #if (EXT_CLK_CRYST == 8000)||        (EXT_CLK_CRYST == 10000)

          /* 8MHz */

         ICS_C1 = ICS_C1 & ~(ICS_C1_RDIV_MASK) | ICS_C1_RDIV(3);        /* now the divided frequency is 8000/256 = 31.25K */

  #elif (EXT_CLK_CRYST == 4000)

          /* 4MHz */

         ICS_C1 = ICS_C1 & ~(ICS_C1_RDIV_MASK) | ICS_C1_RDIV(2);        /* now the divided frequency is 4000/128 = 31.25K */        

  #elif (EXT_CLK_CRYST == 16000)        

          /* 16MHz */

         ICS_C1 = ICS_C1 & ~(ICS_C1_RDIV_MASK) | ICS_C1_RDIV(4);        /* now the divided frequency is 16000/512 = 31.25K */

          

  #elif (EXT_CLK_CRYST == 20000)

          /* 20MHz */

          ICS_C1 = ICS_C1 & ~(ICS_C1_RDIV_MASK) | ICS_C1_RDIV(4);        /* now the divided frequency is 20000/512 = 39.0625K */

          

  #elif (EXT_CLK_CRYST == 32)

          ICS_C1 = ICS_C1 & ~(ICS_C1_RDIV_MASK);

  #else

          #error "Error: crystal value not supported!\n";

  #endif



        /* change FLL reference clock to external clock */

        ICS_C1 =  ICS_C1 & ~ICS_C1_IREFS_MASK;

         

        

        /* wait for the reference clock to be changed to external */

#if defined(IAR)        

        asm(

                "nop \n"

                "nop \n"

        );

#elif defined(__MWERKS__)

        asm{

                nop 

                nop

};        

#endif        

        while(ICS_S & ICS_S_IREFST_MASK);

        

        /* wait for FLL to lock */

        while(!(ICS_S & ICS_S_LOCK_MASK));

                

        /* now FLL output clock is 31.25K*512*2 = 32MHz

         * 

         */

        if(((ICS_C2 & ICS_C2_BDIV_MASK)>>5) != 1)

        {

                ICS_C2 = (ICS_C2 & ~(ICS_C2_BDIV_MASK)) | ICS_C2_BDIV(1);

        }

        /* now system/bus clock is the target frequency

         * 

         */

        /* clear Loss of lock sticky bit */

        ICS_S |= ICS_S_LOLS_MASK;        

}