str71,smart card SCCLK出不来

只看该作者 · 2007-7-20 16:24

我用str711f2的UART1设置成smart card mode，用的是ST网上源程序，但P012没有clk出来。请ST ARM帮忙一下，应该怎么配置SCCLK 才会Clk出来，谢谢

void SC_Init(void)
{
   /*--------------------------------------------------------------------------
        INIT SC PINS
    ---------------------------------------------------------------------------*/
   GPIO_Config(GPIO0, (1<<SMARTCARD_DATAIN_OUT)|(1<<SMARTCARD_CLOCK_OUT),GPIO_AF_PP);    // P010 as SMC Data In/Out
                                                                                        // P012 as SMC Clock

   GPIO_Config(GPIO0, 1<<SMARTCARD_RESET,GPIO_OUT_PP);            // P00 as SMC Reset
   GPIO_Config(GPIO0, 1<<SMARTCARD_VCC,GPIO_OUT_PP);            // P01 as SMC VCC
   GPIO_Config(GPIO0, 1<<SMARTCARD_DETECT,GPIO_IN_TRI_TTL);    // P02 as SMC Detect

   /*--------------------------------------------------------------------------
        CONFIGURE SC CLOCK
    ---------------------------------------------------------------------------*/
   SC_ClockConfig(CLK_DIV2);

   /*--------------------------------------------------------------------------
        INIT SC PHERIPERAL
    ---------------------------------------------------------------------------*/
   UART_Init(UART1);
   UART_OnOffConfig(UART1, ENABLE);     // Turn UARTX on
   UART_SC_Config(UART1,ENABLE);        // Enable Smart Card Interface
   UART_FifoConfig (UART1, DISABLE);    // Disable FIFOs
   UART_FifoReset(UART1, UART_RxFIFO);  // Reset the UART_RxFIFO
   UART_FifoReset(UART1, UART_TxFIFO);  // Reset the UART_TxFIFO
   UART_LoopBackConfig(UART1, DISABLE);    // Disable Loop Back
                                         /* Configure the UARTX as following:
                                             - Baudrate = 9600 Bps
                                             - Odd arity
                                             - 8 data bits + 1 byte Parity
                                             - 1.5 stop bit */
   //UART_Config(UART1, 9600, UART_EVEN_PARITY, UART_1_5_StopBits, UARTM_8D_P);
   //UART_Config(UART1, 10752, UART_EVEN_PARITY, UART_1_5_StopBits, UARTM_8D_P);
   UART_Config(UART1, 10752, UART_EVEN_PARITY, UART_1_5_StopBits, UARTM_8D_P);
   //UART_Config(UART1, 5370, UART_EVEN_PARITY, UART_1_5_StopBits, UARTM_8D_P);
   UART_RxConfig(UART1, ENABLE);         // Disable Rx
   UART_GuardTimeConfig(UART1,0x3);

   /*--------------------------------------------------------------------------
        INIT BUS
    ---------------------------------------------------------------------------*/
   SC_Reset(LOW);                            // reset pin = 1 - logica negata
   SC_Power(ENABLE);                        // disable power - logica negata
   SC_CLKCON(ENABLE);

   /*--------------------------------------------------------------------------
        CONFIGURE IRQ
    ---------------------------------------------------------------------------*/
   UART_GuardTimeConfig(UART1,2);                        // delay TX_empty assertion of 2 bit@Baudrate
   EIC->IPR = 0xFFFFFFFF;                                 // Clear all pending bits
   EIC_IRQChannelPriorityConfig(UART1_IRQChannel, 1);
   EIC_IRQChannelConfig(UART1_IRQChannel, ENABLE);
   EIC_IRQConfig(ENABLE);
}

只看该作者 · 2007-7-27 13:32

after shit you can understand!

str71,smart card SCCLK出不来

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