/**************************************************************************//**
* @file main.c
* @version V1.00
* $Revision: 5 $
* $Date: 14/08/04 9:33a $
* @brief Demonstrate how to use PDMA channel 0 to transfer data from memory to memory.
* @note
* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include <stdio.h>
#include "NUC123.h"
/*---------------------------------------------------------------------------------------------------------*/
/* Macro, type and constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define PLLCON_SETTING CLK_PLLCON_72MHz_HXT
#define PLL_CLOCK 72000000
#define TEST_CH 0
volatile uint32_t PDMA_TEST_LENGTH = 64;
volatile uint8_t SrcArray[64];
volatile uint8_t DestArray[64];
uint32_t volatile u32IsTestOver = 0xFF;
/*---------------------------------------------------------------------------------------------------------*/
/* Global variables */
/*---------------------------------------------------------------------------------------------------------*/
uint32_t volatile rx_flag = 0;
/**
* @brief DMA IRQ
*
* @param None
*
* @return None
*
* @Details The DMA default IRQ, declared in startup_nuc200Series.s.
*/
void PDMA_IRQHandler(void)
{
uint32_t status = PDMA_GET_INT_STATUS();
if(status & 0x1) /* CH0 */
{
if(PDMA_GET_CH_INT_STS(0) & 0x2)
u32IsTestOver = 0;
PDMA_CLR_CH_INT_FLAG(0, PDMA_ISR_BLKD_IF_Msk);
}
else if(status & 0x2) /* CH1 */
{
if(PDMA_GET_CH_INT_STS(1) & 0x2)
u32IsTestOver = 1;
rx_flag = 1;
PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_BLKD_IF_Msk);
}
else if(status & 0x4) /* CH2 */
{
if(PDMA_GET_CH_INT_STS(2) & 0x2)
u32IsTestOver = 2;
PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_BLKD_IF_Msk);
}
else if(status & 0x8) /* CH3 */
{
if(PDMA_GET_CH_INT_STS(3) & 0x2)
u32IsTestOver = 3;
PDMA_CLR_CH_INT_FLAG(3, PDMA_ISR_BLKD_IF_Msk);
}
else if(status & 0x10) /* CH4 */
{
if(PDMA_GET_CH_INT_STS(4) & 0x2)
u32IsTestOver = 4;
PDMA_CLR_CH_INT_FLAG(4, PDMA_ISR_BLKD_IF_Msk);
}
else if(status & 0x20) /* CH5 */
{
if(PDMA_GET_CH_INT_STS(5) & 0x2)
u32IsTestOver = 5;
PDMA_CLR_CH_INT_FLAG(5, PDMA_ISR_BLKD_IF_Msk);
}
else
printf("unknown interrupt !!\n");
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable Internal RC clock */
CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
/* Waiting for IRC22M clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));
/* Enable XT1_OUT(PF.0) and XT1_IN(PF.1) */
SYS->GPF_MFP |= SYS_GPF_MFP_PF0_XT1_OUT | SYS_GPF_MFP_PF1_XT1_IN;
/* Enable external 12MHz XTAL, internal 22.1184MHz */
CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk | CLK_PWRCON_OSC22M_EN_Msk);
/* Enable PLL and Set PLL frequency */
CLK_SetCoreClock(PLL_CLOCK);
/* Waiting for clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk | CLK_CLKSTATUS_XTL12M_STB_Msk | CLK_CLKSTATUS_OSC22M_STB_Msk);
/* Switch HCLK clock source to PLL, STCLK to HCLK/2 */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_CLKDIV_HCLK(2));
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
CLK_EnableModuleClock(UART1_MODULE);
/* Enable PDMA module clock */
CLK->AHBCLK |= CLK_AHBCLK_PDMA_EN_Msk;
/* Select UART module clock source */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));
CLK_SetModuleClock(UART1_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
//SystemCoreClockUpdate();
PllClock = PLL_CLOCK; // PLL
SystemCoreClock = PLL_CLOCK / 1; // HCLK
CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay()
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set GPB multi-function pins for UART0 RXD and TXD */
SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB0_Msk | SYS_GPB_MFP_PB1_Msk|SYS_GPB_MFP_PB4_Msk|SYS_GPB_MFP_PB5_Msk);
SYS->GPB_MFP |= (SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD|SYS_GPB_MFP_PB4_UART1_RXD | SYS_GPB_MFP_PB5_UART1_TXD);
}
void UART0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
/* Reset IP */
SYS_ResetModule(UART0_RST);
SYS_ResetModule(UART1_RST);
/* Configure UART0 and set UART0 Baudrate */
UART_Open(UART0, 115200);
UART_Open(UART1, 1000000);
}
#define DMA_UARTTX 0
#define DMA_UARTRX 1
/*---------------------------------------------------------------------------------------------------------*/
/* Main Function */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
int i;
/* Init System, IP clock and multi-function I/O
In the end of SYS_Init() will issue SYS_LockReg()
to lock protected register. If user want to write
protected register, please issue SYS_UnlockReg()
to unlock protected register if necessary */
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
for (i=0;i<64;i++)
{
SrcArray=i;
DestArray=0;
}
/* Init UART0 for printf */
UART0_Init();
UART1->IER=UART_IER_DMA_TX_EN_Msk|UART_IER_DMA_RX_EN_Msk;
PDMA_Open(1 << DMA_UARTTX);
PDMA_SetTransferCnt(DMA_UARTTX, PDMA_WIDTH_8, PDMA_TEST_LENGTH);
PDMA_SetTransferAddr(DMA_UARTTX, (uint32_t)SrcArray, PDMA_SAR_INC, (uint32_t)&UART1->THR, PDMA_DAR_FIX);
//PDMA_EnableInt(DMA_UARTTX, PDMA_IER_BLKD_IE_Msk);
PDMA0->CSR = (PDMA0->CSR & ~(PDMA_CSR_MODE_SEL_Msk) | (0x2 << PDMA_CSR_MODE_SEL_Pos));
PDMA_Open(1 << DMA_UARTRX);
PDMA_SetTransferCnt(DMA_UARTRX, PDMA_WIDTH_8, PDMA_TEST_LENGTH);
PDMA_SetTransferAddr(DMA_UARTRX, (uint32_t)&UART1->RBR, PDMA_SAR_FIX, (uint32_t)DestArray, PDMA_DAR_INC);
PDMA_EnableInt(DMA_UARTRX, PDMA_IER_BLKD_IE_Msk);
PDMA1->CSR = (PDMA1->CSR & ~(PDMA_CSR_MODE_SEL_Msk) | (0x1 << PDMA_CSR_MODE_SEL_Pos));
PDMA_GCR->PDSSR1=0x0FFF01FF;
NVIC_EnableIRQ(PDMA_IRQn);
//master
while(1)
{
//if(PB6==0)
//{
PDMA_Trigger(DMA_UARTRX);
PDMA_Trigger(DMA_UARTTX);
while(rx_flag ==0 );
rx_flag = 0;
for(i=0;i<64;i++)
{
if(SrcArray!=DestArray)
while(1);
SrcArray=i;
DestArray=0;
}
//}
#if 0
u32IsTestOver = 0xFF;
PDMA_Trigger(DMA_UARTRX); //first
if(PB6==0)
{
PDMA_Trigger(DMA_UARTTX);
while(u32IsTestOver != DMA_UARTRX);
u32IsTestOver = 0xFF;
for(i=0;i<64;i++)
{
if(SrcArray!=DestArray)
while(1);
SrcArray=i;
DestArray=0;
}
}
#endif
}
#if 0
u32IsTestOver = 0xFF;
PDMA_Trigger(DMA_UARTRX);
PDMA_Trigger(DMA_UARTTX);
while(u32IsTestOver != DMA_UARTRX);
for (i=0;i<64;i++)
{
SrcArray=i;
DestArray=0;
}
u32IsTestOver = 0xFF;
PDMA_Trigger(DMA_UARTRX);
PDMA_Trigger(DMA_UARTTX);
while(u32IsTestOver != DMA_UARTRX);
if(u32IsTestOver == DMA_UARTRX)
printf("test done...\n");
#endif
#if 0
printf("\n\nCPU @ %dHz <%d>\n", SystemCoreClock, TEST_CH);
printf("+--------------------------------------+ \n");
printf("| NUC123 PDMA Driver Sample Code | \n");
printf("+--------------------------------------+ \n");
/* Open Channel TEST_CH */
PDMA_Open(1 << TEST_CH);
PDMA_SetTransferCnt(TEST_CH, PDMA_WIDTH_32, PDMA_TEST_LENGTH);
PDMA_SetTransferAddr(TEST_CH, (uint32_t)SrcArray, PDMA_SAR_INC, (uint32_t)&UART0->THR;, PDMA_DAR_FIX);
PDMA_EnableInt(TEST_CH, PDMA_IER_BLKD_IE_Msk);
NVIC_EnableIRQ(PDMA_IRQn);
u32IsTestOver = 0xFF;
PDMA_Trigger(TEST_CH);
while(u32IsTestOver == 0xFF);
if(u32IsTestOver == TEST_CH)
printf("test done...\n");
PDMA_Close();
#endif
while(1);
}
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