关于51核

只看该作者 · 2008-4-28 20:54

请问core50最高能加多少频率的时钟？
核是单周期指令的还是12周期指令的？
谢谢！

只看该作者 · 2008-4-29 21:13

最高多少频率请参看布局布线后的报告，核是单周期指令

只看该作者 · 2008-4-30 09:27

只看该作者 · 2008-5-1 22:05

是布线完了再看吗？
Compile report:
===============

    CORE                     Used:   5137  Total:  13824   (37.16%)
    IO (W/ clocks)           Used:     18  Total:    119   (15.13%)
    Differential IO          Used:      0  Total:     58   (0.00%)
    GLOBAL (Chip+Quadrant)   Used:      1  Total:     18   (5.56%)
    PLL                      Used:      1  Total:      2   (50.00%)
    RAM/FIFO                 Used:      1  Total:     24   (4.17%)
    Low Static ICC           Used:      0  Total:      1   (0.00%)
    FlashROM                 Used:      0  Total:      1   (0.00%)
    User JTAG                Used:      0  Total:      1   (0.00%)
    RC oscillator            Used:      0  Total:      1   (0.00%)
    XTL oscillator           Used:      0  Total:      1   (0.00%)
    NVM                      Used:      1  Total:      2   (50.00%)
    AB                       Used:      0  Total:      1   (0.00%)
    AnalogIO                 Used:      0  Total:     46   (0.00%)
    VRPSM                    Used:      0  Total:      1   (0.00%)
    No-Glitch MUX            Used:      0  Total:      2   (0.00%)

Global Information:

    Type            | Used   | Total
    ----------------|--------|-------------
    Chip global     | 1      | 6  (16.67%)
    Quadrant global | 0      | 12 (0.00%)

Core Information:

    Type    | Instances    | Core tiles
    --------|--------------|-----------
    COMB    | 4271         | 4271
    SEQ     | 570          | 866

I/O Function:

    Type                          | w/o register  | w/ register  | w/ DDR register
    ------------------------------|---------------|--------------|----------------
    Input I/O                     | 2             | 0            | 0
    Output I/O                    | 16            | 0            | 0
    Bidirectional I/O             | 0             | 0            | 0
    Differential Input I/O Pairs  | 0             | 0            | 0
    Differential Output I/O Pairs | 0             | 0            | 0

I/O Technology:

                                    |   Voltages    |             I/Os
    --------------------------------|-------|-------|-------|--------|--------------
    I/O Standard(s)                 | Vcci  | Vref  | Input | Output | Bidirectional
    --------------------------------|-------|-------|-------|--------|--------------
    LVTTL                           | 3.30v | N/A   | 2     | 16     | 0

Net information report:
=======================

The following nets drive enable flip-flops that have been remapped to a 2-tile implementation:
    EffCnt  Type          Name
    --------------------------
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXX10
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXX6
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXX9
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXX5
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXX7
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXX3
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX38
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX29
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX37
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX28
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX48
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX23
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX52
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX17
    12      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX53
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX16
    11      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXX35
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXX32
    11      SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXXXXXXXX2
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXXXXXX

The following nets have been assigned to a chip global resource:
    Fanout  Type          Name
    --------------------------
    570     CLK_NET       Net   : mcuclk
                          Driver: U0/Core
                          Source: ESSENTIAL

High fanout nets in the post compile netlist:
    Fanout  Type          Name
    --------------------------
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXXXXXXXX4
                          Driver: U3/XXXYXXXXXX/MXXXXXXXXXXXXXXXXPXXXXXXXXXX0
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXXXXXXXXXX5
                          Driver: U3/XXXYXXXXXX/MXXXXXXXXXXXXXXXXPXXXXXXXXXXXX1
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXXXPXXXXXXXX
                          Driver: U3/XXXYXXXXXX0/MXXXXXXXXXXXXXXXXXXXXPXXXX2
    13      INT_NET       Net   : U3/XFXXXXXXXXXX2
                          Driver: U3/XXXYXXXXXX3/MXXXXXXXXXXXXXXXXXMXFXXXXLXXXMXFXXXXXXXXXX9
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXFXXXXXXXXXX7
                          Driver: U3/XXXYXXXXXX3/MXXXXXXXXXXXXXXXXXMXFXXXXLXXXMXFXXXXXXXXXX8
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXFXXXXXXXXXX4
                          Driver: U3/XXXYXXXXXX3/MXXXXXXXXXXXXXXXXXMXFXXXXLXXXMXFXXXXXXXXXX7
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXFXXXXXXXXXX
                          Driver: U3/XXXYXXXXXX3/MXXXXXXXXXXXXXXXXXMXFXXXXLXXXMXFXXXXXXXXXX6
    13      INT_NET       Net   : U3/MXXXXXXXXXXXXXXFXXXXXXXXXX1
                          Driver: U3/XXXYXXXXXX3/MXXXXXXXXXXXXXXXXXMXFXXXXLXXXMXFXXXXXXXXXX10
    13      INT_NET       Net   : U3/XXXYXXXXXX4/MXXXXXXXXXXXXXXXMXMXXXLXXPXXXXXX3
                          Driver: U3/XXXYXXXXXX4/MXXXXXXXXXXXXXXXMXMXXXLXXPXXXXXXXXXXX1
    13      INT_NET       Net   : U3/XXXYXXXXXX4/MXXXXXXXXXXXXXXXMXMXXXLXXPXXXX4
                          Driver: U3/XXXYXXXXXX4/MXXXXXXXXXXXXXXXMXMXXXLXXPXXXXXXXXX5

Nets that are candidates for clock assignment and the resulting fanout:
    Fanout  Type          Name
    --------------------------
    563     SET/RESET_NET Net   : U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXX
                          Driver: U3/MXXXXXXXXXXXXXXXPMXXXXXXXXXXXX
    47      INT_NET       Net   : memdatai[6]
                          Driver: U1/NVM_INST
    40      INT_NET       Net   : memdatai[5]
                          Driver: U1/NVM_INST
    40      INT_NET       Net   : memdatai[7]
                          Driver: U1/NVM_INST
    39      INT_NET       Net   : memdatai[2]
                          Driver: U1/NVM_INST
    38      INT_NET       Net   : memdatai[4]
                          Driver: U1/NVM_INST
    37      INT_NET       Net   : memdatai[3]
                          Driver: U1/NVM_INST
    32      INT_NET       Net   : memdatai[1]
                          Driver: U1/NVM_INST
    31      INT_NET       Net   : memdatai[0]
                          Driver: U1/NVM_INST
    22      INT_NET       Net   : mempsacki
                          Driver: U2/mempsacki

The Compile command succeeded ( 00:00:30 )

只看该作者 · 2008-5-6 20:13

在Designer软件中有个SmartTime,其中有一个Timing Analyzer请在里面查看

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有道理 ！谢谢！

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您好

有道理！谢谢！