TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; //»ù±¾½á¹¹Ìå
TIM_OCInitTypeDef TIM_OCInitStructure; //Êä³ö½á¹¹Ìå
TIM_BDTRInitTypeDef TIM_BDTRInitStructure; //ËÀÇøɲ³µ½á¹¹Ìå
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1,ENABLE);
TIM_DeInit(TIM1);
TIM_TimeBaseStructure.TIM_Prescaler = 0; //TIM1»ù±¾³õʼ»¯
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;//ÖÐÑë¶ÔÆë¼¼Êõģʽ TIM_CounterMode_UpÏòÉϼÆÊý
TIM_TimeBaseStructure.TIM_Period = 1499; //PWM 16K
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1,&TIM_TimeBaseStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;//TIM_OCMode_Timing; //TIM1Êä³öͨµÀ³õʼ»¯
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = 499;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
TIM_OC1Init(TIM1,&TIM_OCInitStructure);
// TIM_OCInitStructure.TIM_Pulse =1200;
TIM_OC2Init(TIM1,&TIM_OCInitStructure);
// TIM_OCInitStructure.TIM_Pulse =1200;
TIM_OC3Init(TIM1,&TIM_OCInitStructure);
// TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //TIM1ͨµÀ4³õʼ»¯£¬ÓÃÓÚ´¥·¢AD²ÉÑù
// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Disable;
// TIM_OCInitStructure.TIM_Pulse =1495;
// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
//
// TIM_OC4Init(TIM1,&TIM_OCInitStructure);
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; //ËÀÇøɲ³µ³õʼ»¯
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;
TIM_BDTRInitStructure.TIM_DeadTime = 10;
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable; //²»ÄÜ´ò¿ª£¿
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
TIM_BDTRConfig(TIM1,&TIM_BDTRInitStructure);
TIM_OC1PreloadConfig(TIM1,TIM_OCPreload_Enable); //ʹÄܲ¶»ñ±È½Ï¼Ä´æÆ÷ԤװÔØ
TIM_OC2PreloadConfig(TIM1,TIM_OCPreload_Enable); //ʹÄܲ¶»ñ±È½Ï¼Ä´æÆ÷ԤװÔØ
TIM_OC3PreloadConfig(TIM1,TIM_OCPreload_Enable); //ʹÄܲ¶»ñ±È½Ï¼Ä´æÆ÷ԤװÔØ
TIM_CCPreloadControl(TIM1, ENABLE);
TIM_SelectCOM(TIM1, ENABLE);
TIM_SelectInputTrigger(TIM1, TIM_TS_ITR1); //ÊäÈë´¥·¢Ô´Ñ¡ÔñTIM2
TIM_ITConfig(TIM1, TIM_IT_COM, ENABLE);
TIM_Cmd(TIM1,ENABLE);
TIM_CtrlPWMOutputs(TIM1,ENABLE);
case 0x01:{
TIM1->CCER=0x3098;//3,6 cb
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
case 0x05:{
TIM1->CCER=0x3089;//2,3 ab
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
case 0x04:{
TIM1->CCER=0x3809;//2,5 ac
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
case 0x06:{
TIM1->CCER=0x3908;//4,5 bc
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
case 0x02:{
TIM1->CCER=0x3980;//1,4 ba
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
case 0x03:{
TIM1->CCER=0x3890;//1,6 ca
// TIM_GenerateEvent(TIM1,TIM_EventSource_COM);
};break;
default:break;
//*/
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