LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY cnt4 IS
PORT (clk:IN STD_LOGIC;
q:OUT INTEGER RANGE 0 TO 15);
END cnt4;
ARCHITECTURE behavior OF cnt4 IS
SIGNAL s: INTEGER RANGE 0 to 15;
BEGIN
PROCESS(clk,S)
BEGIN
IF clk'event AND clk='1' THEN
s=s+1;
END IF;
q<=s;
END PROCESS;
END behavior;
好像MAX+PLUS软件不支持缓冲方式,我该如何修改这个程序,使他能正常编译呢??就支持87标准对吗? |
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