请问这段话是什么意思： When the SPI is a master, nSS pin is used to check multi-master error, provided the SPPIN's ENMUL bit is active, and another GPIO should be used to select a slave. 是不是配置为：ＳＰＩ主机，使能ＥＮＭＵＬ检测，就一定要使用另外一个ＧＰＩＯ作为ＮＳＳ引脚，这里的ＮＳＳ用来做什么？怎么检测多主机冲突？这是怎么的一个工作过程？
我觉得问题还没有弄清楚，以ＮＳＳ０为例子． 首先：ＮＳＳ０可以影射到三根引脚：ＧＰＧ２，ＧＰＥ３，ＧＰＤ１５． 然后看２４１０对ＳＰＩ的一些描述： （１）SPI接口描述 SPIMISO[1:0]－ IO－ SPIMISO is the master data input line, when SPI is configured as a master. When SPI is configured as a slave, these pins reverse its role. SPIMOSI[1:0] －IO －SPIMOSI is the master data output line, when SPI is configured as a master. When SPI is configured as a slave, these pins reverse its role. SPICLK[1:0] －IO －SPI clock nSS[1:0] －I －SPI chip select(only for slave mode)，这里说只针对从机模式． （２）状态寄存器的Multi Master Error Flag描述 This flag is set if the nSS signal goes to active low while the SPI is configured as a master, and SPPINn's ENMUL bit is multi master errors detect mode. MULF is cleared by reading SPSTAn. 0 = not detect, 1 = multi master error detect （３）SPI PIN CONTROL REGISTER寄存器描述 When the SPI system is enabled, the direction of pins, except nSS pin, is controlled by MSTR bit of SPCONn register. The direction of nSS pin is always input.（这里说ＮＳＳ永远作为输入） When the SPI is a master, nSS pin is used to check multi-master error, provided the SPPIN's ENMUL bit is active, and another GPIO should be used to select a slave.（这里说要选择另外一个ＧＰＩＯ来选择从机，那ＮＳＳ０影射到哪个引脚？） If the SPI is configured as a slave, the nSS pin is used to select SPI as a slave by one master. 其中的Multi Master error detect Enable (ENMUL)标志描述： The /SS pin is used as an input to detect multi master error when the SPI system is a master. 0 = disable (general purpose) 1 = multi master error detect enable
楼主
标题置顶
标题高亮
