芯片没有坏,但是还是调试不能通过
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但是就是调试过不去，把程序贴出来，让大侠们来把把脉。这个程序参考MCB2300的EasyWeb的EMAC.C写的，几乎没有改变。<br />void Init_EMAC(INT8U MACAddr[])<br />{<br /> extern void Ethernet_Handler(void);<br />// Keil: function modified to access the EMAC<br />// Initializes the EMAC ethernet controller<br /> INT32U regv,tout,id1,id2;<br /><br /> /* Power Up the EMAC controller. */<br /> PCONP |= 0x40000000;<br /><br /> /* Enable P1 Ethernet Pins. */<br /> // PINSEL2 = 0x55555555;<br /> PINSEL2 = 0x50151105;<br /> PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;<br /><br /> /* Reset all EMAC internal modules. */<br /> MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |<br /> MAC1_SIM_RES | MAC1_SOFT_RES;<br /> <font color=#0000FF>/*MAC_MAC1 = 0xCF00 */</font><br /> MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;<br /> <font color=#0000FF>/* MAC_COMMAND = 0x0038 */</font><br /> /* A short delay after reset. */<br /> for (tout = 0; tout < 100; tout++);<br /><br /> /* Initialize MAC control registers. */<br /><br /> MAC_MAC1 = MAC1_PASS_ALL; <font color=#FF0000>/* 就在此过不去了 */</font><br /> MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;<br /> MAC_MAXF = ETH_MAX_FLEN;<br /> MAC_CLRT = CLRT_DEF;<br /> MAC_IPGR = IPGR_DEF;<br /><br /> /* Enable Reduced MII interface. */<br /> MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;<br /><br /> /* Reset Reduced MII Logic. */<br /> MAC_SUPP = SUPP_RES_RMII; <br /> for (tout = 0; tout < 100; tout++);<br /> MAC_SUPP = 0;<br /><br /> /* Put the DM9161A in reset mode */<br /> write_PHY (PHY_REG_BMCR, 0x8000);<br /><br /> /* Wait for hardware reset to end. */<br /> for (tout = 0; tout < 0x100000; tout++) <br /> {<br /> regv = read_PHY (PHY_REG_BMCR);<br /> if (!(regv & 0x8000)) <br /> {<br /> /* Reset complete */<br /> break;<br /> }<br /> }<br /><br /> /* Check if this is a DP83848C PHY. */<br /> id1 = read_PHY (PHY_REG_IDR1);<br /> id2 = read_PHY (PHY_REG_IDR2);<br /> if (((id1 << 16) | (id2 & 0xF800)) == DM9161A_ID) <br /> {<br /> /* Configure the PHY device */<br /><br /> /* Use autonegotiation about the link speed. */<br /> write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);<br /> /* Wait to complete Auto_Negotiation. */<br /> for (tout = 0; tout < 0x100000; tout++) <br /> {<br /> regv = read_PHY (PHY_REG_BMSR);<br /> if (regv & 0x0020) <br /> {<br /> /* Autonegotiation Complete. */<br /> break;<br /> }<br /> }<br /> }<br /><br /> /* Check the link status. */<br /> for (tout = 0; tout < 0x10000; tout++) <br /> {<br /> regv = read_PHY (PHY_REG_BMSR);<br /> if (regv & 0x0004) <br /> {<br /> /* Link is on. */<br /> break;<br /> }<br /> }<br /> /* Configure Full/Half Duplex mode. */<br /> if (regv & 0x5000) <br /> {<br /> /* Full duplex is enabled. */<br /> MAC_MAC2 |= MAC2_FULL_DUP;<br /> MAC_COMMAND |= CR_FULL_DUP;<br /> MAC_IPGT = IPGT_FULL_DUP;<br /> }<br /> else <br /> {<br /> /* Half duplex mode. */<br /> MAC_IPGT = IPGT_HALF_DUP;<br /> }<br /><br /> /* Configure 100MBit/10MBit mode. */<br /> if ((regv & 0x6000) == 0x0000) <br /> {<br /> /* 10MBit mode. */<br /> MAC_SUPP = 0;<br /> }<br /> else <br /> {<br /> /* 100MBit mode. */<br /> MAC_SUPP = SUPP_SPEED;<br /> }<br /><br /> /* Set the Ethernet MAC Address registers */<br /> MAC_SA0 = (MACAddr[0] << 8) | MACAddr[1];<br /> MAC_SA1 = (MACAddr[2] << 8) | MACAddr[3];<br /> MAC_SA2 = (MACAddr[4] << 8) | MACAddr[5];<br /><br /> /* Initialize Tx and Rx DMA Descriptors */<br /> rx_descr_init ();<br /> tx_descr_init ();<br /> <br /> install_irq(EMAC_INT,(void *)Ethernet_Handler,EMAC_PRIO);<br /> <br /> /* Receive Broadcast and Perfect Match Packets */<br /> MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;<br /><br /> /* Enable EMAC interrupts. */<br /> MAC_INTENABLE = INT_RX_DONE | INT_TX_DONE;<br /><br /> /* Reset all interrupts */<br /> MAC_INTCLEAR = 0xFFFF;<br /><br /> /* Enable receive and transmit mode of MAC Ethernet core */<br /> MAC_COMMAND |= (CR_RX_EN | CR_TX_EN);<br /> MAC_MAC1 |= MAC1_REC_EN;<br />}<br />
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