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always @(posedge clk) begin<br /> ...<br />end<br /><br />always @(posedge bit[0] or posedge bit[1] or posedge bit[2] or posedge bit[3]) begin<br /> ...<br />end<br /><br />clk and [3:0]bit 是变量……<br /><br />hoho
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楼主
