LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.std_logic_ARITH.ALL;
USE IEEE.std_logic_UNSIGNED.ALL;
ENTITY led IS
PORT(
ld1,ld2,ld3,ld4,ld5,ld6,ld7,ld8:out std_logic;
clk,rst:in std_logic
);
end led;
ARCHITECTURE light OF led IS
SIGNAL s1:integer range 0 to 9600000; --参考量
BEGIN
PROCESS(clk,rst)
BEGIN
if(rst='1')then s1<=0;
elsif(clk'event and clk='1') THEN
s1<=s1+1;
IF(s1<4800000)then
ld1<='0';
ld2<='1';
ld3<='0';
ld4<='1';
ld5<='0';
ld6<='1';
ld7<='0';
ld8<='1';
elsIF(s1>=48000000 and s1<9600000)then
ld1<='0';
ld2<='1';
ld3<='0';
ld4<='1';
ld5<='0';
ld6<='1';
ld7<='0';
ld8<='1';
else s1<=0;
END IF;
END IF;
END PROCESS;
END light;
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