[技术问答] M451的SPI0

/**************************************************************************//**

 * [url=home.php?mod=space&uid=288409]@file[/url]     main.c

 * [url=home.php?mod=space&uid=895143]@version[/url]  V1.0

 * $Revision: 7 $

 * $Date: 15/09/02 10:04a $

 * @brief

 *           Configure SPI0 as Master mode and demonstrate how to communicate with an off-chip SPI Slave device.

 *          Needs to work with SPI_SlaveMode sample code.

 * @note

 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.

 *

 ******************************************************************************/

#include <stdio.h>

#include "M451Series.h"





#define TEST_COUNT 16



uint32_t g_au32SourceData[TEST_COUNT];

uint32_t g_au32DestinationData[TEST_COUNT];

volatile uint32_t g_u32TxDataCount;

volatile uint32_t g_u32RxDataCount;



/* Function prototype declaration */

void SYS_Init(void);

void SPI_Init(void);



/* ------------- */

/* Main function */

/* ------------- */

int main(void)

{

    uint32_t u32DataCount;



    /* Unlock protected registers */

    SYS_UnlockReg();

    /* Init System, IP clock and multi-function I/O. */

    SYS_Init();

    /* Lock protected registers */

    SYS_LockReg();



    /* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */

    UART_Open(UART0, 115200);



    /* Init SPI */

    SPI_Init();



    printf("\n\n");

    printf("+--------------------------------------------------------+\n");

    printf("|             SPI Master Mode Sample Code                |\n");

    printf("+--------------------------------------------------------+\n");

    printf("\n");

    printf("Configure SPI0 as a master.\n");

    printf("Bit length of a transaction: 32\n");

    printf("The I/O connection for SPI0:\n");

    printf("    SPI0_SS (PB.4)\n    SPI0_CLK (PB.2)\n");

    printf("    SPI0_MISO0 (PB.3)\n    SPI0_MOSI0 (PB.5)\n\n");

    printf("SPI controller will transfer %d data to a off-chip slave device.\n", TEST_COUNT);

    printf("In the meanwhile the SPI controller will receive %d data from the off-chip slave device.\n", TEST_COUNT);

    printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);

    printf("The SPI master configuration is ready.\n");



    for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)

    {

        /* Write the initial value to source buffer */

        g_au32SourceData[u32DataCount] = 0x00550000 + u32DataCount;

        /* Clear destination buffer */

        g_au32DestinationData[u32DataCount] = 0;

    }



    printf("Before starting the data transfer, make sure the slave device is ready. Press any key to start the transfer.");

    getchar();

    printf("\n");



    /* Set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */

    SPI_SetFIFO(SPI0, 4, 4);

    SPI_EnableInt(SPI0, SPI_FIFO_TXTH_INT_MASK | SPI_FIFO_RXTO_INT_MASK);

    g_u32TxDataCount = 0;

    g_u32RxDataCount = 0;

    NVIC_EnableIRQ(SPI0_IRQn);



    /* Wait for transfer done */

    while(g_u32RxDataCount < TEST_COUNT);



    /* Print the received data */

    printf("Received data:\n");

    for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)

    {

        printf("%d:\t0x%X\n", u32DataCount, g_au32DestinationData[u32DataCount]);

    }

    /* Disable TX FIFO threshold interrupt and RX FIFO time-out interrupt */

    SPI_DisableInt(SPI0, SPI_FIFO_TXTH_INT_MASK | SPI_FIFO_RXTO_INT_MASK);

    NVIC_DisableIRQ(SPI0_IRQn);

    printf("The data transfer was done.\n");



    printf("\n\nExit SPI driver sample code.\n");



    /* Reset SPI0 */

    SPI_Close(SPI0);

    while(1);

}



void SYS_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init System Clock                                                                                       */

    /*---------------------------------------------------------------------------------------------------------*/



    /* Enable external 12MHz XTAL */

    CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);



    /* Waiting for clock ready */

    CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);



    /* Switch HCLK clock source to HXT and HCLK source divide 1 */

    CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT, CLK_CLKDIV0_HCLK(1));



    /* Select HXT as the clock source of UART0 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));



    /* Select PCLK0 as the clock source of SPI0 */

    CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL2_SPI0SEL_PCLK0, MODULE_NoMsk);



    /* Enable UART peripheral clock */

    CLK_EnableModuleClock(UART0_MODULE);

    /* Enable SPI0 peripheral clock */

    CLK_EnableModuleClock(SPI0_MODULE);



    /* Update System Core Clock */

    /* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CyclesPerUs automatically. */

    SystemCoreClockUpdate();



    /*---------------------------------------------------------------------------------------------------------*/

    /* Init I/O Multi-function                                                                                 */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Set PD multi-function pins for UART0 RXD and TXD */

    SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);

    SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);



    /* Set SPI0 multi-function pins */

    SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB2MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk | SYS_GPB_MFPL_PB4MFP_Msk | SYS_GPB_MFPL_PB5MFP_Msk);

    SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB2MFP_SPI0_CLK | SYS_GPB_MFPL_PB3MFP_SPI0_MISO0 | SYS_GPB_MFPL_PB4MFP_SPI0_SS | SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0);

}



void SPI_Init(void)

{

    /*---------------------------------------------------------------------------------------------------------*/

    /* Init SPI                                                                                                */

    /*---------------------------------------------------------------------------------------------------------*/

    /* Configure SPI0 as a master, SPI clock rate 2 MHz,

       clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */

    SPI_Open(SPI0, SPI_MASTER, SPI_MODE_0, 32, 2000000);

    /* Enable the automatic hardware slave selection function. Select the SPI0_SS pin and configure as low-active. */

    SPI_EnableAutoSS(SPI0, SPI_SS, SPI_SS_ACTIVE_LOW);

}



void SPI0_IRQHandler(void)

{

    /* Check RX EMPTY flag */

    while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

    {

        /* Read RX FIFO */

        g_au32DestinationData[g_u32RxDataCount++] = SPI_READ_RX(SPI0);

    }

    /* Check TX FULL flag and TX data count */

    while((SPI_GET_TX_FIFO_FULL_FLAG(SPI0) == 0) && (g_u32TxDataCount < TEST_COUNT))

    {

        /* Write to TX FIFO */

        SPI_WRITE_TX(SPI0, g_au32SourceData[g_u32TxDataCount++]);

    }

    if(g_u32TxDataCount >= TEST_COUNT)

        SPI_DisableInt(SPI0, SPI_FIFO_TXTH_INT_MASK); /* Disable TX FIFO threshold interrupt */



    /* Check the RX FIFO time-out interrupt flag */

    if(SPI_GetIntFlag(SPI0, SPI_FIFO_RXTO_INT_MASK))

    {

        /* If RX FIFO is not empty, read RX FIFO. */

        while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI0) == 0)

            g_au32DestinationData[g_u32RxDataCount++] = SPI_READ_RX(SPI0);

    }

}





/*** (C) COPYRIGHT 2014~2015 Nuvoton Technology Corp. ***/