本帖最后由 zgh51688 于 2010-3-16 20:48 编辑
各位大侠，本人刚买了一个开发板
编了了一个verilog读写sram:is61lv51216-10ns芯片
本想在地址0-4中写入2-6，之后读出2中的数，可读出总是6
本人刚学，请教各位怎么改
谢谢！！
module sram_test(clk_50m, //input
ub_n, //output
lb_n,
ce_n,
we_n,
oe_n,
sram_addr,
da_out,
sram_da , //inout
);
input clk_50m;
output ub_n,lb_n,ce_n,we_n,oe_n;
output[17:0] sram_addr;
output[2:0] da_out;
inout[15:0] sram_da;
reg ub_n,lb_n,ce_n,we_n,oe_n,clk_25m;
reg[17:0] sram_addr;
reg[15:0] sram_da,ram_c;
reg[2:0] da_out;
initial begin
ub_n=0; //output
lb_n=0;
ce_n=0;
we_n=1;
oe_n=1;
sram_addr=16'd0;
sram_da=16'd0;
da_out=0;
ram_c=0;
end
[email=always@(posedge]always@(posedge[/email] clk_50m) //25m clk
begin
clk_25m<=~clk_25m;
end
[email=always@(posedge]always@(posedge[/email] clk_25m)
begin
if(ram_c==10)
ram_c<=0;
else ram_c<=ram_c+1;
if(ram_c<5) //write sram
begin
we_n=1;
sram_addr=ram_c;
sram_da=ram_c+2;
we_n=0;
end
else //read sram
begin
if(ram_c==7)
da_out=sram_da;
sram_addr=ram_c-5;
we_n=1;
oe_n=0;
end
end
endmodule |
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