//******************************************************************************
// MSP430F54x Demo - Timer_B, Toggle P1.0, Overflow ISR, 32kHz ACLK
//
// Description: Toggle P1.0 using software and the Timer_B overflow ISR.
// In this example an ISR triggers when TB overflows. Inside the ISR P1.0
// is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the
// TBIV interrupt vector generator is demonstrated.
// ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.045MHz
//
// MSP430F5438
// ---------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// M Smertneck / W. Goh
// Texas Instruments Inc.
// September 2008
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "msp430x54x.h"
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x01; // Set P1.0 to output direction
TBCTL = TBSSEL_1 + MC_2 + TBCLR + TBIE; // ACLK, contmode, clear TBR,
// enable interrupt
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts
__no_operation(); // For debugger
}
// Timer_B7 Interrupt Vector (TBIV) handler
#pragma vector=TIMERB1_VECTOR
__interrupt void TIMERB1_ISR(void)
{
/* Any access, read or write, of the TBIV register automatically resets the
highest "pending" interrupt flag. */
switch( __even_in_range(TBIV,14) )
{
case 0: break; // No interrupt
case 2: break; // CCR1 not used
case 4: break; // CCR2 not used
case 6: break; // CCR3 not used
case 8: break; // CCR4 not used
case 10: break; // CCR5 not used
case 12: break; // CCR6 not used
case 14: P1OUT ^= 0x01; // overflow
break;
default: break;
}
} |
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