| void TIM1_GPIO_Configuration(void)
{
        GPIO_InitTypeDef GPIO_InitStructure;
        GPIO_PinRemapConfig(GPIO_FullRemap_TIM1,ENABLE);
        RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO|RCC_APB2Periph_GPIOE|RCC_APB2Periph_TIM1,ENABLE);
        GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AF_PP;
        GPIO_InitStructure.GPIO_Pin=GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15;
        GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
        GPIO_Init(GPIOE,&GPIO_InitStructure);
}
void TIM1_MODE_Configuration(void)
{        
        TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure;
        TIM_OCInitTypeDef TIM_OCInitStructure;
        NVIC_InitTypeDef NVIC_InitStructure;
        TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
        
        TIM_TimeBaseInitStructure.TIM_Period=14399;                
        TIM_TimeBaseInitStructure.TIM_Prescaler=0;                
        TIM_TimeBaseInitStructure.TIM_ClockDivision=TIM_CKD_DIV1;        
        TIM_TimeBaseInitStructure.TIM_CounterMode=TIM_CounterMode_CenterAligned1;        
        TIM_TimeBaseInitStructure.TIM_RepetitionCounter=0;
        TIM_TimeBaseInit(TIM1,&TIM_TimeBaseInitStructure);
        
        TIM_OCInitStructure.TIM_OCMode=TIM_OCMode_PWM2;
        TIM_OCInitStructure.TIM_OutputState=TIM_OutputState_Enable;
        TIM_OCInitStructure.TIM_OutputNState=TIM_OutputNState_Enable;
        TIM_OCInitStructure.TIM_Pulse=0;
        TIM_OCInitStructure.TIM_OCPolarity=TIM_OCPolarity_Low;
        TIM_OCInitStructure.TIM_OCNPolarity=TIM_OCNPolarity_Low;
        TIM_OCInitStructure.TIM_OCIdleState=TIM_OCIdleState_Set;        
        TIM_OCInitStructure.TIM_OCNIdleState=TIM_OCNIdleState_Reset;
        TIM_OC1Init(TIM1,&TIM_OCInitStructure);
        TIM_OC1PreloadConfig(TIM1,TIM_OCPreload_Enable);
        
        TIM_OCInitStructure.TIM_OutputState=TIM_OutputState_Enable;
        TIM_OCInitStructure.TIM_Pulse=0;
        TIM_OC2Init(TIM1,&TIM_OCInitStructure); 
        TIM_OC2PreloadConfig(TIM1,TIM_OCPreload_Enable);
        
        TIM_OCInitStructure.TIM_OutputState=TIM_OutputState_Enable;
        TIM_OCInitStructure.TIM_Pulse=0;
        TIM_OC3Init(TIM1,&TIM_OCInitStructure); 
        TIM_OC3PreloadConfig(TIM1,TIM_OCPreload_Enable);
        
//        TIM_OCInitStructure.TIM_OutputState=TIM_OutputState_Enable;
//        TIM_OCInitStructure.TIM_Pulse=125;
//        TIM_OC4Init(TIM1,&TIM_OCInitStructure); 
//        TIM_OC4PreloadConfig(TIM1,TIM_OCPreload_Enable);
  NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);            
  NVIC_InitStructure.NVIC_IRQChannel=TIM1_UP_IRQn;         
        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=0; 
        NVIC_InitStructure.NVIC_IRQChannelSubPriority=0;        
        NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE;         
        NVIC_Init(&NVIC_InitStructure); 
        TIM_ITConfig(TIM1,TIM_IT_Update,ENABLE);
        
        TIM_BDTRInitStructure.TIM_OSSRState=TIM_OSSRState_Disable;
        TIM_BDTRInitStructure.TIM_OSSIState=TIM_OSSIState_Disable;      
        TIM_BDTRInitStructure.TIM_LOCKLevel=TIM_LOCKLevel_OFF;       
        TIM_BDTRInitStructure.TIM_DeadTime=0;                                          
        TIM_BDTRInitStructure.TIM_Break=TIM_Break_Disable;                    
        TIM_BDTRInitStructure.TIM_BreakPolarity=TIM_BreakPolarity_High;   
        TIM_BDTRInitStructure.TIM_AutomaticOutput=TIM_AutomaticOutput_Enable;   
        TIM_BDTRConfig(TIM1,&TIM_BDTRInitStructure);
        
        TIM_ARRPreloadConfig(TIM1,ENABLE);
        TIM_Cmd(TIM1,ENABLE);
        TIM_CtrlPWMOutputs(TIM1,ENABLE);
}
中断里
                TIM1->CCR1 =svpwmdq1.Ta*72;
                TIM1->CCR2 =svpwmdq1.Tb*72;
                TIM1->CCR3 =svpwmdq1.Tc*72;                
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