- static void SetSysClockTo108HSI(void)
- {
- __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-
- /* CK_SYS, AHB, APB2 and APB1 configuration ---------------------------*/
- /* AHB = CK_SYS not divided */
- RCC->GCFGR |= (uint32_t)RCC_GCFGR_AHBPS_DIV1;
-
- /* APB2 = AHB not divided */
- RCC->GCFGR |= (uint32_t)RCC_GCFGR_APB2PS_DIV1;
-
- /* APB1 = AHB is divided 2 */
- RCC->GCFGR |= (uint32_t)RCC_GCFGR_APB1PS_DIV2;
- /* Configure PLLs ------------------------------------------------------*/
-
- /* PLL configuration: PLLCLK = (HSI/2) * 27 = 108 MHz */
- RCC->GCFGR &= (uint32_t)((uint32_t)~(RCC_GCFGR_PLLSEL | RCC_GCFGR_PLLPREDV | RCC_GCFGR_PLLMF));
- RCC->GCFGR |= (uint32_t)( RCC_GCFGR_PLLSEL_HSI_DIV2 | RCC_GCFGR_PLLMF27);
- /* Enable PLL */
- RCC->GCCR |= RCC_GCCR_PLLEN;
- /* Wait till PLL is ready */
- while((RCC->GCCR & RCC_GCCR_PLLSTB) == 0)
- {
- }
- /* Select PLL as system clock source */
- RCC->GCFGR &= (uint32_t)((uint32_t)~(RCC_GCFGR_SCS));
- RCC->GCFGR |= (uint32_t)RCC_GCFGR_SCS_PLL;
- /* Wait till PLL is used as system clock source */
- while ((RCC->GCFGR & (uint32_t)RCC_GCFGR_SCSS) != (uint32_t)0x08)
- {
- }
- }
这是官方的初始化库,目前看得没什么问题,就是不干活
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