unsigned char MST_Data,SLV_Data;
int main( void )
{
volatile unsigned int i;
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
//P1端口输出寄存器清零
P1OUT=0X00;
//设置P1.5为输出
P1DIR|=BIT5;
//开启I/O口管脚的SPI功能，P1.1(UCA0SOMI),P1.2(UCA0SIMO),P1.4(UCA0CLK)
P1SEL=BIT1+BIT2+BIT4;
P1SEL2=BIT1+BIT2+BIT4;
//设置USCIA0模块工作在主机模式
//时钟无效状态为高，工作在3线制主机模式下，数据最高有效位在前
UCA0CTL0|=UCCKPL+UCMSB+UCMST+UCSYNC;
//设置USCIA0时钟源为SMCLK,SMCLK默认时钟为DCO约为1MHz
UCA0CTL1|=UCSSEL_2;
//设置时钟分频系数为2
UCA0BR0|=0X02;
UCA0BR1=0;
//没有频率调整
UCA0MCTL=0;
//初始化USCIA0状态机
UCA0CTL1&=~UCSWRST;
//SPI接口初始化完毕，向从机发送控制电平
P1OUT&=~BIT5;
P1OUT|=BIT5;
//延时等待从机初始化
__delay_cycles(75);
//数据赋值
MST_Data=0x01;
SLV_Data=0x01;
//写使能
UCA0TXBUF=0X02;
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
UCA0TXBUF=0X60;
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
P1OUT&=~BIT5;
P1OUT|=BIT5;
UCA0TXBUF=0X02; //写命令和地址 0
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
UCA0TXBUF=0X80; //写命令和地址 0
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
UCA0TXBUF=0X55; //写数据
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
P1OUT&=~BIT5;
__delay_cycles(75);
P1OUT|=BIT5;
__delay_cycles(75);
for(i=0;i<30000;i++);
P1OUT&=~BIT5;
P1OUT|=BIT5;
//读
UCA0TXBUF=0X03;
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
UCA0TXBUF=0X00;
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
UCA0TXBUF=0X00; //虚写
while(UCA0STAT&UCBUSY); //等待发送完成
UCA0STAT&=~UCBUSY;
P1OUT&=~BIT5;
SLV_Data=UCA0RXBUF;
while(1);
} |
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