/* Includes ------------------------------------------------------------------*/
#include "stm32f37x.h"
#include "stdio.h" //2017.01.09heìí¼ó
/* Private variables ---------------------------------------------------------*/
uint16_t flag=0;
uint32_t TimingDelay = 0;
/* Private define ------------------------------------------------------------*/
#define SDADC1_DR_Address 0x40016060 //2017.01.10 heìí¼ó SDADC1íaéèμÄ»ùμØÖ·(0x4001 6000)¼óéÏSDADC data register for injected group (SDADC_JDATAR)μÄμØÖ·Æ«òÆ(0x60)¼ÆËãμÃμ½
#define SDADC2_DR_Address 0x40016460 //2017.01.12 heìí¼ó
#define SDADC3_DR_Address 0x40016860 //2017.01.12 heìí¼ó
/* Private typedef --------------------------------2017.01.12 heìí¼ó--------------*/
typedef struct{ uint16_t SDADC_InjectedConvData[6];} SDADC_ALLDATA;
typedef struct{ uint16_t SDADC1_InjectedConvData[2];
uint16_t SDADC2_InjectedConvData[2];
uint16_t SDADC3_InjectedConvData[2];} SDADC_EACHDATA;
typedef union{ SDADC_ALLDATA SDADC_AllData;
SDADC_EACHDATA SDADC_EachData;} SDADC_DATA;
SDADC_DATA SDADC_Data;
//2017.01.09he begin
#ifdef __GNUC__
#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
#else
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
#endif /* __GNUC__ */
PUTCHAR_PROTOTYPE
{
USART_SendData(USART1, (uint8_t) ch); //·¢Ëíò»×Ö½úêy¾Y
while (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)
{} //μè′y·¢Ëííê3é
return ch;
}
//2017.01.09he end
void GPIO_Config(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC|RCC_AHBPeriph_GPIOB|RCC_AHBPeriph_GPIOA|RCC_AHBPeriph_GPIOE, ENABLE);
/* LEDS */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10|GPIO_Pin_11;
// GPIO_Init(GPIOC, &GPIO_InitStructure);
//
// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
// GPIO_Init(GPIOA, &GPIO_InitStructure);
// GPIO_SetBits(GPIOA,GPIO_Pin_3); 2017.01.09 he×¢êí
}
void SysTick_Handler(void)
{
if (TimingDelay != 0x00)
{
TimingDelay--;
}
}
void DDelay(__IO uint32_t nTime)
{
TimingDelay = nTime;
while(TimingDelay != 0);
}
uint32_t SDADC_Config(void) //2017.01.11heDT¸Ä
{
SDADC_AINStructTypeDef SDADC_AINStructure;
GPIO_InitTypeDef GPIO_InitStructure;
uint32_t SDADCTimeout = 0;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDADC1|RCC_APB2Periph_SDADC2|RCC_APB2Periph_SDADC3, ENABLE);//2017.01.11heDT¸Ä
SDADC_DeInit(SDADC1);
SDADC_DeInit(SDADC2); //2017.01.11heìí¼ó
SDADC_DeInit(SDADC3); //2017.01.11heìí¼ó
/* PWR APB1 interface clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Enable SDADC analog interface */
PWR_SDADCAnalogCmd(PWR_SDADCAnalog_1|PWR_SDADCAnalog_2|PWR_SDADCAnalog_3, ENABLE);//2017.01.11heDT¸Ä
/* Set the SDADC divider: The SDADC should run @6MHz */
/* If Sysclk is 72MHz, SDADC divider should be 12 */
RCC_SDADCCLKConfig(RCC_SDADCCLK_SYSCLK_Div12);
/* GPIO Peripheral clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE|RCC_AHBPeriph_GPIOB, ENABLE); //2017.01.11heDT¸Ä
/* SDADC1 channel 3P 8P pin configuration: PE7 PE8*/ /* SDADC2 channel 4P 3P pin configuration: PE11 PE12*/
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
//GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_11|GPIO_Pin_12; //2017.01.11heDT¸Ä
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_14|GPIO_Pin_15; //2017.01.11heDT¸Ä
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* SDADC3 channel 8P 7P pin configuration: PB14 PB15*/ //2017.01.11heìí¼ó
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14|GPIO_Pin_15;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Select External reference: The reference voltage selection is available
only in SDADC1 and therefore to select the VREF for SDADC2/SDADC3, SDADC1
clock must be already enabled */
SDADC_VREFSelect(SDADC_VREF_VDDA);
/* Insert delay equal to ~5 ms */
DDelay(5);
SDADC_Cmd(SDADC1, ENABLE);
SDADC_Cmd(SDADC2, ENABLE); //2017.01.12heìí¼ó
SDADC_Cmd(SDADC3, ENABLE); //2017.01.12heìí¼ó
SDADC_InitModeCmd(SDADC1, ENABLE);
SDADC_InitModeCmd(SDADC2, ENABLE); //2017.01.12heìí¼ó
SDADC_InitModeCmd(SDADC3, ENABLE); //2017.01.12heìí¼ó
SDADCTimeout = 30;
/* wait for INITRDY flag to be set */
while((SDADC_GetFlagStatus(SDADC1, SDADC_FLAG_INITRDY) == RESET) && ((SDADC_GetFlagStatus(SDADC2, SDADC_FLAG_INITRDY) == RESET))
&& ((SDADC_GetFlagStatus(SDADC3, SDADC_FLAG_INITRDY) == RESET)) && (--SDADCTimeout != 0)); //2017.01.12heDT¸Ä
if(SDADCTimeout == 0)
{
/* INITRDY flag can not set */
return 1;
}
SDADC_AINStructure.SDADC_InputMode = SDADC_InputMode_SEOffset;
SDADC_AINStructure.SDADC_Gain = SDADC_Gain_1_2;//GAIN is 0.5
SDADC_AINStructure.SDADC_CommonMode = SDADC_CommonMode_VSSA;
SDADC_AINStructure.SDADC_Offset = 0;
SDADC_AINInit(SDADC1, SDADC_Conf_0, &SDADC_AINStructure);
SDADC_AINInit(SDADC2, SDADC_Conf_0, &SDADC_AINStructure); //2017.01.12heìí¼ó
SDADC_AINInit(SDADC3, SDADC_Conf_0, &SDADC_AINStructure); //2017.01.12heìí¼ó
SDADC_ChannelConfig(SDADC1, SDADC_Channel_3|SDADC_Channel_8, SDADC_Conf_0); //DT¸Ä
SDADC_ChannelConfig(SDADC2, SDADC_Channel_0|SDADC_Channel_1, SDADC_Conf_0); //2017.01.12heìí¼ó
SDADC_ChannelConfig(SDADC3, SDADC_Channel_7|SDADC_Channel_8, SDADC_Conf_0); //2017.01.12heìí¼ó
SDADC_InjectedChannelSelect(SDADC1,SDADC_Channel_3|SDADC_Channel_8); //2017.01.10 heìí¼ó ±ØDëÕaÑù2Å¿éòÔ£¬·Ö¿aÅäÖÃμÄ»°£¬oóÃæÅäÖÃμÄí¨μà»á¸2¸ÇÇ°ÃæμÄ
SDADC_InjectedChannelSelect(SDADC2,SDADC_Channel_0|SDADC_Channel_1); //2017.01.12heìí¼ó
SDADC_InjectedChannelSelect(SDADC3,SDADC_Channel_7|SDADC_Channel_8); //2017.01.12heìí¼ó
SDADC_InjectedContinuousModeCmd(SDADC1,ENABLE); //2017.01.10 heìí¼ó
SDADC_InjectedContinuousModeCmd(SDADC2,ENABLE); //2017.01.12 heìí¼ó
SDADC_InjectedContinuousModeCmd(SDADC3,ENABLE); //2017.01.12 heìí¼ó
/* Select an external trigger */
SDADC_ExternalTrigInjectedConvConfig(SDADC1, SDADC_ExternalTrigInjecConv_T19_CC2); //2017.01.12 heDT¸Ä Trigger source for SDADC1
SDADC_ExternalTrigInjectedConvConfig(SDADC1, SDADC_ExternalTrigInjecConv_T19_CC3); //2017.01.11 heìí¼ó Trigger source for SDADC2
SDADC_ExternalTrigInjectedConvConfig(SDADC1, SDADC_ExternalTrigInjecConv_T19_CC4); //2017.01.11 heìí¼ó Trigger source for SDADC3
/* Select rising edge */
SDADC_ExternalTrigInjectedConvEdgeConfig(SDADC1, SDADC_ExternalTrigInjecConvEdge_Rising); //2017.01.11 heìí¼ó
SDADC_ExternalTrigInjectedConvEdgeConfig(SDADC2, SDADC_ExternalTrigInjecConvEdge_Rising); //2017.01.12 heìí¼ó
SDADC_ExternalTrigInjectedConvEdgeConfig(SDADC3, SDADC_ExternalTrigInjecConvEdge_Rising); //2017.01.12 heìí¼ó
SDADC_DMAConfig(SDADC1,SDADC_DMATransfer_Injected,ENABLE); //2017.01.10 heìí¼ó
SDADC_DMAConfig(SDADC2,SDADC_DMATransfer_Injected,ENABLE); //2017.01.12 heìí¼ó
SDADC_DMAConfig(SDADC3,SDADC_DMATransfer_Injected,ENABLE); //2017.01.12 heìí¼ó
SDADC_InjectedSynchroSDADC1(SDADC3,ENABLE);
SDADC_InjectedSynchroSDADC1(SDADC2,ENABLE);
SDADC_InitModeCmd(SDADC1, DISABLE);
SDADC_InitModeCmd(SDADC2, DISABLE); //2017.01.12 heìí¼ó
SDADC_InitModeCmd(SDADC3, DISABLE); //2017.01.12 heìí¼ó
/* configure calibration to be performed on conf0 */
SDADC_CalibrationSequenceConfig(SDADC1, SDADC_CalibrationSequence_1);
SDADC_CalibrationSequenceConfig(SDADC2, SDADC_CalibrationSequence_1); //2017.01.12 heìí¼ó
SDADC_CalibrationSequenceConfig(SDADC3, SDADC_CalibrationSequence_1); //2017.01.12 heìí¼ó
/* start PT100_SDADC Calibration */
SDADC_StartCalibration(SDADC1);
SDADC_StartCalibration(SDADC2); //2017.01.12 heìí¼ó
SDADC_StartCalibration(SDADC3); //2017.01.12 heìí¼ó
/* Set calibration timeout: 5.12 ms at 6 MHz in a single calibration sequence */
SDADCTimeout = 4*30720 ;
/* wait for PT100_SDADC Calibration process to end */
while((SDADC_GetFlagStatus(SDADC1, SDADC_FLAG_EOCAL) == RESET) && (SDADC_GetFlagStatus(SDADC2, SDADC_FLAG_EOCAL) == RESET)
&& (SDADC_GetFlagStatus(SDADC3, SDADC_FLAG_EOCAL) == RESET) && (--SDADCTimeout != 0)); //2017.01.12heDT¸Ä
if(SDADCTimeout == 0)
{
/* EOCAL flag can not set */
return 2;
}
/* SDADC successfully configured */
return 0;
}
//2017.01.10he ìí¼óDMAÅäÖÃoˉêy
void DMA_Config(void) //2017.01.12 heDT¸Ä
{
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2,ENABLE);
DMA_DeInit(DMA2_Channel3); //»Ö¸′ĬèÏÖ죬Õa¸öêDZØòaμÄ SDADC1
DMA_DeInit(DMA2_Channel4); //2017.01.12 heìí¼ó SDADC2
DMA_DeInit(DMA2_Channel5); //2017.01.12 heìí¼ó SDADC3
/* DMA2 channel3 configuration ----------------------------------------------*/
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDADC1_DR_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&(SDADC_Data.SDADC_EachData.SDADC1_InjectedConvData); //DMAóëmemoryᬽóμıäá¿μÄμØÖ·£¬¶¨òå±äá¿
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; //éèÖÃDMAμÄ′«êä·½Ïò£¬′Ë′|Îaμ¥Ïò′«ê䣻˫Ïò′«êä£oDMA_DIR_PeripheralDST
DMA_InitStructure.DMA_BufferSize = 2; //éèÖÃDMAÔú′«êäê±»o3åÇøμÄ3¤¶è
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //éèÖÃDMAμÄíaéèμYÔöģ꽣¬èôóD¶à¸öíaéèᬽó£¬ÔòDèòaê1óÃíaéèμYÔöģ꽣¬′Ë′|Ö»óëSDADC1½¨á¢áaÏμ
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //DMA_MemoryInc_Disable; DMA·ÃÎê¶à¸öÄú′æ2Îêyê±ê1óÃEnable,·ÃÎêò»¸öÄú′æ2Îêyê±ê1óÃDisable
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //éèÖÃDMAÔú·ÃÎêê±Ã¿′Î2ù×÷μÄêy¾Y3¤¶è óD3ÖÖêy¾YààDí£oByte¡¢HalfWord¡¢word
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //1¸öHalfwordÕ¼16λ
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //éèÖÃDMAμÄ′«êäģ꽣oá¬Dø2»¶ÏμÄÑ-»·Ä£ê½£¬èôÖ»Ïë·ÃÎêò»′λò°′Ö¸áî2ù×÷à′·ÃÎ꣬¿ééèÖÃ3éNormalÄ£ê½
DMA_InitStructure.DMA_Priority = DMA_Priority_High; //éèÖÃDMAμÄóÅÏ輶±e VeryHigh,High,Medium,Low
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; //éèÖÃDMAμÄ2¸ömemoryÖDμıäá¿»¥Ïà·ÃÎê
DMA_Init(DMA2_Channel3, &DMA_InitStructure);
/* DMA2 channel4 configuration -------------- 2017.01.12 heìí¼ó-----------------*/
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDADC2_DR_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&(SDADC_Data.SDADC_EachData.SDADC2_InjectedConvData); //DMAóëmemoryᬽóμıäá¿μÄμØÖ·£¬¶¨òå±äá¿
DMA_Init(DMA2_Channel4, &DMA_InitStructure);
/* DMA2 channel5 configuration ---------------2017.01.12 heìí¼ó--------------*/
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDADC3_DR_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&(SDADC_Data.SDADC_EachData.SDADC3_InjectedConvData); //DMAóëmemoryᬽóμıäá¿μÄμØÖ·£¬¶¨òå±äá¿
DMA_Init(DMA2_Channel5, &DMA_InitStructure);
/* NVIC Configuration */ //2017.01.10 heìí¼ó
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* NVIC Configuration */ //2017.01.12 heìí¼ó
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* NVIC Configuration */ //2017.01.12 heìí¼ó
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable DMA2 Channel3 Transfer half interrupt */
DMA_ITConfig(DMA2_Channel3, DMA_IT_HT, ENABLE); //2017.01.11heDT¸Ä
DMA_ITConfig(DMA2_Channel4, DMA_IT_HT, ENABLE); //2017.01.12 heìí¼ó
DMA_ITConfig(DMA2_Channel5, DMA_IT_HT, ENABLE); //2017.01.12 heìí¼ó
/* Enable DMA2 channel3/4/5 */
DMA_Cmd(DMA2_Channel3, ENABLE);
DMA_Cmd(DMA2_Channel4, ENABLE);
DMA_Cmd(DMA2_Channel5, ENABLE);
} |