我写的PWM程序，一直没有仿真成功，哪位大神能点播一下，谢谢！
#include <xc.h>
#include"config.h"
#define _XTAL_FREQ 4000000
#define INT8U unsigned char
#define INT16U unsigned int
void Init_PWM();
void PWM_OUT(INT16U PwmOut);
//__delay_ms();
//__delay_us();
//*******主程序***********
void main()
{
INT16U x0 = 512;
Init_PWM();
while(1)
{
PWM_OUT(x0);
}
}
void Init_PWM()
{
TRISCbits.RC2 = 1; //RC2/CCP1设置为禁止输出
ANSELCbits.ANSC2 = 0; //使能数字输出功能
// CCPTMRS0bits.C1TSEL1 = 0;
// CCPTMRS0bits.C1TSEL0 = 0;
CCPTMRS0bits.C1TSEL = 0x0; //0000 0000 CPP1 PWM使用TMR2
PR2 = 124; //定时器初值:PR2=[500/(4*0.25*4)]-1=124=0x7C
// CCP1CONbits.CCP1M3 = 1;
// CCP1CONbits.CCP1M2 = 1;
// CCP1CONbits.CCP1M1 = 0;
// CCP1CONbits.CCP1M0 = 0;
CCP1CONbits.CCP1M = 0xC; //0000 1100 设置为PWM模式
CCP1CONbits.DC1B1 = 0;
CCP1CONbits.DC1B0 = 0;
CCPR1L = 0x80; //0000 00[10 0000 00]00 初始占空比50%
PIR1bits.TMR2IF = 0; //清零中断标志位
// T2CONbits.T2CKPS1 = 0;
// T2CONbits.T2CKPS0 = 1;
T2CONbits.T2CKPS = 0x1; //TMR2选择四分频
T2CONbits.TMR2ON = 1; //开定时器开
TRISCbits.RC2 = 0; //RC2/CCP1设置为输出
// PIE1bits.TMR2IE = 1;
// INTCONbits.GIE = 1;
}
void PWM_OUT(INT16U PwmOut)
{
CCP1CONbits.DC1B1 = (bit)(PwmOut >> 1);
CCP1CONbits.DC1B0 = (bit)PwmOut;
CCPR1L = (INT8U)(PwmOut >> 2);
}
//***********************************************************************************************************************************
//===================================配置位设置=========================================================
// CONFIG1H
#pragma config FOSC = XT // Oscillator Selection bits (XT oscillator)
#pragma config PLLCFG = OFF // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = ON // Primary clock enable bit (Primary clock is always enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRTEN = ON // Power-up Timer Enable bit (Power up timer enabled)
#pragma config BOREN = NOSLP // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled))
#pragma config BORV = 285 // Brown Out Reset Voltage bits (VBOR set to 2.85 V nominal)
// CONFIG2H
#pragma config WDTEN = SWON // Watchdog Timer Enable bits (WDT is controlled by SWDTEN bit of the WDTCON register)
#pragma config WDTPS = 1 // Watchdog Timer Postscale Select bits (1:1)
// CONFIG3H
#pragma config CCP2MX = PORTB3 // CCP2 MUX bit (CCP2 input/output is multiplexed with RB3)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config CCP3MX = PORTB5 // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = OFF // HFINTOSC Fast Start-up (HFINTOSC output and ready status are delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0 // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTD2 // ECCP2 B output mux bit (P2B is on RD2)
#pragma config MCLRE = EXTMCLR // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection Block 0 (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection Block 1 (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection Block 2 (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection Block 3 (Block 3 (00C000-00FFFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection Block 2 (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection Block 3 (Block 3 (00C000-00FFFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection Block 2 (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection Block 3 (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
//================================================================================================================================================================
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