/**************************************************************************//**
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V1.00
* $Revision: 6 $
* $Date: 15/09/02 11:55a $
* [url=home.php?mod=space&uid=247401]@brief[/url] NUC200 Series I2S Controller Sample Code
*
* @note
* Copyright (C) 2011 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include <stdio.h>
#include "NUC230_240.h"
#include "NuEdu-Basic01.h"
extern unsigned int cap_buffer[256];
extern unsigned int cap_edge[256];
extern unsigned int cap_count;
unsigned int i,temp;
#define DATA_FLAHSH_OFFSET 0x0001F000
uint32_t SIM_EEPROM_READ(uint32_t address)
{
uint32_t temp_data;
temp_data=*((uint32_t*)(address+DATA_FLAHSH_OFFSET));
return temp_data;
}
void SIM_EEPROM_WRITE(uint32_t address,uint32_t data)
{
uint32_t i,j;
uint32_t buffer[512];
if((SIM_EEPROM_READ(address)==0xffffffff)|((SIM_EEPROM_READ(address)&data)==data))
{
FMC_Write(address+DATA_FLAHSH_OFFSET, data);
}
else
{
//backup date
j=0;
// printf("0x%x\n\r",DATA_FLAHSH_OFFSET+(address/512)+(512));
for(i=DATA_FLAHSH_OFFSET+((address/512)*512);i<DATA_FLAHSH_OFFSET+((address/512)*512)+512;i=i+4)
{
//printf("0x%x\n\r",i);
//printf("0x%x\n\r",FMC_Read(i));
buffer[j]=FMC_Read(i);
j++;
}
//erase page
FMC_Erase(DATA_FLAHSH_OFFSET+((address/512)*512));
buffer[(address%512)/4]=data;
j=0;
for(i=DATA_FLAHSH_OFFSET+((address/512)*512);i<DATA_FLAHSH_OFFSET+((address/512)*512)+512;i=i+4)
{
FMC_Write(i,buffer[j]);
j++;
}
}
}
/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function */
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
SYS_Init();
Open_Seven_Segment();
SYS_UnlockReg();
FMC_Open();
while(1)
{
if(PC13==0)
{
Show_Seven_Segment(1,1);
//clear buffer
cap_count=0;
for(i=0;i<256;i++)
{
cap_buffer[i]=0;
cap_edge[i]=1;
}
IrDA_NEC_Rx_Init();
while(PB14==1);
Show_Seven_Segment(2,1);
NVIC_DisableIRQ(PWMB_IRQn);
}
if(PE8==0)
{
Show_Seven_Segment(3,1);
IrDA_NEC_Tx_Init();
for(i=0;i<256;i++)
{
if(cap_buffer[i]==0)
goto END;
if(cap_edge[i]==1)
{
CLK_SysTickDelay(cap_buffer[i]);
}
else
{
PWM_EnableOutput(PWMB, 0X04);
CLK_SysTickDelay(cap_buffer[i]);
PWM_DisableOutput(PWMB, 0X04);
}
}
END:
Show_Seven_Segment(4,1);
}
if(PC14==0)//write learn data data eeprom
{
Show_Seven_Segment(5,1);
for(i=0;i<256;i++)
{
SIM_EEPROM_WRITE((i*4),cap_buffer[i]);
SIM_EEPROM_WRITE((256*4)+(i*4),cap_edge[i]);
}
Show_Seven_Segment(6,1);
}
if(PC15==0) //read learn data data eeprom
{
Show_Seven_Segment(7,1);
//clear ram buffer
cap_count=0;
for(i=0;i<256;i++)
{
cap_buffer[i]=0;
cap_edge[i]=1;
}
for(i=0;i<256;i++)
{
cap_buffer[i]=SIM_EEPROM_READ((i*4));
cap_edge[i]=SIM_EEPROM_READ((256*4)+(i*4));
}
Show_Seven_Segment(8,1);
}
}
}
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