STM32F103VC FSMC驱动ILI9325问题

只看该作者 · 2010-11-2 15:27

本帖最后由 topcat 于 2010-11-3 11:53 编辑

求STM32F103VC FSMC驱动ILI9325的代码
自己弄了下没成功

PD0-15 --->D0-15
NOE ------>RD
NWE ------>WR
NE1 ------>CS
A23 ------>RS
PC12 ----->RESET

#define RST_PIN (*((volatile unsigned int *) 0x422201B0))
void tft_init(void)
{
RCC->AHBENR  |= (1<<8); //FSMC
RCC->APB2ENR |= (1<<0); //AFIO clock
RCC->APB2ENR |= (1<<4); //GPIOC clock
RCC->APB2ENR |= (1<<5); //GPIOD clock
RCC->APB2ENR |= (1<<6); //GPIOE clock
GPIOC->CRH  = 0x33330000;
GPIOD->CRL  = 0xBBBBBBBB;
GPIOD->CRH  = 0xBBBBBBBB;
GPIOE->CRL  = 0xBBBBBBBB;
GPIOE->CRH  = 0xBBBBBBBB;
FSMC_SRAM_Init();
RST_PIN=1;
LCD_Delay(1000);
RST_PIN=0;
LCD_Delay(40000);
RST_PIN=1;
LCD_Delay(1000);
Write_COM(0x00E5); Write_DATA(0x78F0);
......初始化代码
}

只看该作者 · 2010-11-2 15:28

void FSMC_SRAM_Init(void)
{
  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
  FSMC_NORSRAMTimingInitTypeDef  p;

/*-- FSMC Configuration ------------------------------------------------------*/
  p.FSMC_AddressSetupTime = 2;
  p.FSMC_AddressHoldTime = 1;
  p.FSMC_DataSetupTime = 5;
  p.FSMC_BusTurnAroundDuration = 0;
  p.FSMC_CLKDivision = 0;
  p.FSMC_DataLatency = 0;
  p.FSMC_AccessMode = FSMC_AccessMode_B;

  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;/////
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
//FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

  /* Enable FSMC Bank1_SRAM Bank */
  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
}
void FSMC_SRAM_WriteBuffer(u16* pBuffer, u32 WriteAddr, u8 NumHalfwordToWrite)
{
*(u16 *) (Bank1_SRAM3_ADDR + WriteAddr) = *pBuffer;
}

void Write_COM(uint16_t Reg_Addr)
{
  FSMC_SRAM_WriteBuffer(&Reg_Addr, 0x00000000, 1);
}

void Write_DATA(uint16_t Data)
//void Wr_LCD_Data(u16 Data)
{
  FSMC_SRAM_WriteBuffer(&Data,    0x00800000, 1);
}