/*-------------------------------------------------------------------------------
文 件 名 : NUC1xxcfg.h
创 建 人 : Cortex-M0菜鸟HotPower@163.com,HotPower@126.com,QQ:1270688699
个 人 网 站 ： www.hotpower.org,www.hotpower.net,www.hotpage.net.cn
技 术 博 客 ： http://blog.**/hotpower/
创 建 日 期 : 2010.10.18 18:18
最近修改日期 : 2010.12.8 23:18
创 建 地 点 ： 西安大雁塔村队部
版 本 号 ： V1.06 (红杏正式版)
修 改 原 因 ： 规范并使寄存器模式也能控制到所有位
说 明 ： 菜农掌握本版本的解释权利。
由于本头文件为开源，出现问题恕不承担一切责任。
备 注 ： 本头文件风格归属于菜农的《红杏出墙》系列，堪称“红杏级别”
将本文件拷贝到...\CMSIS\CM0\DeviceSupport\Nuvoton\NUC1xx内。
-------------------------------------------------------------------------------*/
#ifndef __NUC1xxcfg_H__
#define __NUC1xxcfg_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "nuc1xx.h"
#if defined (__CC_ARM)
#pragma anon_unions
#endif
typedef volatile unsigned int NU_REG;
#define __noinit__ __attribute__((zero_init))//变量不初始化为0
typedef enum
{
__0 = (NU_REG)0,
__1 = (NU_REG)1,
__2 = (NU_REG)2,
__3 = (NU_REG)3,
__4 = (NU_REG)4,
__5 = (NU_REG)5,
__6 = (NU_REG)6,
__7 = (NU_REG)7,
__8 = (NU_REG)8,
__9 = (NU_REG)9,
__10 = (NU_REG)10,
__11 = (NU_REG)11,
__12 = (NU_REG)12,
__13 = (NU_REG)13,
__14 = (NU_REG)14,
__15 = (NU_REG)15,
__16 = (NU_REG)16,
__17 = (NU_REG)17,
__18 = (NU_REG)18,
__19 = (NU_REG)19,
__20 = (NU_REG)20,
__21 = (NU_REG)21,
__22 = (NU_REG)22,
__23 = (NU_REG)23,
__24 = (NU_REG)24,
__25 = (NU_REG)25,
__26 = (NU_REG)26,
__27 = (NU_REG)27,
__28 = (NU_REG)28,
__29 = (NU_REG)29,
__30 = (NU_REG)30,
__31 = (NU_REG)31
}Number_enum;
//-------------------------------------------------------//
typedef enum
{
Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7,
Bit8, Bit9, Bit10, Bit11, Bit12, Bit13, Bit14, Bit15,
Bit16, Bit17, Bit18, Bit19, Bit20, Bit21, Bit22, Bit23,
Bit24, Bit25, Bit26, Bit27, Bit28, Bit29, Bit30, Bit31
}NU_Bits_ENUM;
typedef volatile struct
{
NU_REG Bit0: 1;
NU_REG Bit1: 1;
NU_REG Bit2: 1;
NU_REG Bit3: 1;
NU_REG Bit4: 1;
NU_REG Bit5: 1;
NU_REG Bit6: 1;
NU_REG Bit7: 1;
NU_REG Bit8: 1;
NU_REG Bit9: 1;
NU_REG Bit10: 1;
NU_REG Bit11: 1;
NU_REG Bit12: 1;
NU_REG Bit13: 1;
NU_REG Bit14: 1;
NU_REG Bit15: 1;
NU_REG Bit16: 1;
NU_REG Bit17: 1;
NU_REG Bit18: 1;
NU_REG Bit19: 1;
NU_REG Bit20: 1;
NU_REG Bit21: 1;
NU_REG Bit22: 1;
NU_REG Bit23: 1;
NU_REG Bit24: 1;
NU_REG Bit25: 1;
NU_REG Bit26: 1;
NU_REG Bit27: 1;
NU_REG Bit28: 1;
NU_REG Bit29: 1;
NU_REG Bit30: 1;
NU_REG Bit31: 1;
}NU_BITs;
typedef volatile union
{
__IO NU_REG Regs;
__IO NU_BITs Bits;
}NU_REG_BITs;
//----------------------------------------------------//
typedef enum
{
Pin0, Pin1, Pin2, Pin3, Pin4, Pin5, Pin6, Pin7,
Pin8, Pin9, Pin10, Pin11, Pin12, Pin13, Pin14, Pin15,
Pin16, Pin17, Pin18, Pin19, Pin20, Pin21, Pin22, Pin23,
Pin24, Pin25, Pin26, Pin27, Pin28, Pin29, Pin30, Pin31
}NU_Pins_ENUM;
typedef volatile struct
{
NU_REG Pin0: 1;
NU_REG Pin1: 1;
NU_REG Pin2: 1;
NU_REG Pin3: 1;
NU_REG Pin4: 1;
NU_REG Pin5: 1;
NU_REG Pin6: 1;
NU_REG Pin7: 1;
NU_REG Pin8: 1;
NU_REG Pin9: 1;
NU_REG Pin10: 1;
NU_REG Pin11: 1;
NU_REG Pin12: 1;
NU_REG Pin13: 1;
NU_REG Pin14: 1;
NU_REG Pin15: 1;
NU_REG Pin16: 1;
NU_REG Pin17: 1;
NU_REG Pin18: 1;
NU_REG Pin19: 1;
NU_REG Pin20: 1;
NU_REG Pin21: 1;
NU_REG Pin22: 1;
NU_REG Pin23: 1;
NU_REG Pin24: 1;
NU_REG Pin25: 1;
NU_REG Pin26: 1;
NU_REG Pin27: 1;
NU_REG Pin28: 1;
NU_REG Pin29: 1;
NU_REG Pin30: 1;
NU_REG Pin31: 1;
}NU_PINs;
typedef volatile union
{
__IO NU_REG Regs;
__IO NU_PINs Bits;
}NU_REG_PINs;
//----------------------------------------------------//
typedef enum
{
GPIO_OFFD_OFFD0 = 16,GPIO_OFFD_OFFD1,GPIO_OFFD_OFFD2,GPIO_OFFD_OFFD3,
GPIO_OFFD_OFFD4,GPIO_OFFD_OFFD5,GPIO_OFFD_OFFD6,GPIO_OFFD_OFFD7,
GPIO_OFFD_OFFD8,GPIO_OFFD_OFFD9,GPIO_OFFD_OFFD10,GPIO_OFFD_OFFD11,
GPIO_OFFD_OFFD12,GPIO_OFFD_OFFD13,GPIO_OFFD_OFFD14,GPIO_OFFD_OFFD15
}NU_GPIO_OFFD_ENUM;
typedef struct
{
__IO NU_REG RESERVED:16;
__IO NU_REG OFFD0:1;
__IO NU_REG OFFD1:1;
__IO NU_REG OFFD2:1;
__IO NU_REG OFFD3:1;
__IO NU_REG OFFD4:1;
__IO NU_REG OFFD5:1;
__IO NU_REG OFFD6:1;
__IO NU_REG OFFD7:1;
__IO NU_REG OFFD8:1;
__IO NU_REG OFFD9:1;
__IO NU_REG OFFD10:1;
__IO NU_REG OFFD11:1;
__IO NU_REG OFFD12:1;
__IO NU_REG OFFD13:1;
__IO NU_REG OFFD14:1;
__IO NU_REG OFFD15:1;
}NU_GPIO_OFFD_Bits;
typedef volatile union
{
NU_REG Regs;
NU_GPIO_OFFD_Bits Bits;
}NU_GPIO_OFFD_T;
//---------------------------------------------------------------------------------//
typedef enum
{
GPIO_PMD_INPUT,GPIO_PMD_OUTPUT,GPIO_PMD_OPENDRAIN,GPIO_PMD_QUASI
}NU_GPIO_PMD_MODE_ENUM;
typedef enum
{
PORT_PMD_INPUT,PORT_PMD_OUTPUT,PORT_PMD_OPENDRAIN,PORT_PMD_QUASI
}NU_PORT_PMD_MODE_ENUM;
typedef enum
{
GPIO_PMD_PMD0 = 0,GPIO_PMD_PMD1 = 2,GPIO_PMD_PMD2 = 4,GPIO_PMD_PMD3 = 6,
GPIO_PMD_PMD4 = 8,GPIO_PMD_PMD5 = 10,GPIO_PMD_PMD6 = 12,GPIO_PMD_PMD7 = 164,
GPIO_PMD_PMD8 = 16,GPIO_PMD_PMD9 = 18,GPIO_PMD_PMD10 = 20,GPIO_PMD_PMD11 = 22,
GPIO_PMD_PMD12 = 24,GPIO_PMD_PMD13 = 26,GPIO_PMD_PMD14 = 28,GPIO_PMD_PMD15 = 30
}NU_GPIO_PMD_ENUM;
typedef enum
{
PORT_PMD_PMD0 = 0,PORT_PMD_PMD1 = 2,PORT_PMD_PMD2 = 4,PORT_PMD_PMD3 = 6,
PORT_PMD_PMD4 = 8,PORT_PMD_PMD5 = 10,PORT_PMD_PMD6 = 12,PORT_PMD_PMD7 = 164,
PORT_PMD_PMD8 = 16,PORT_PMD_PMD9 = 18,PORT_PMD_PMD10 = 20,PORT_PMD_PMD11 = 22,
PORT_PMD_PMD12 = 24,PORT_PMD_PMD13 = 26,PORT_PMD_PMD14 = 28,PORT_PMD_PMD15 = 30
}NU_PORT_PMD_ENUM;
typedef volatile union
{
NU_REG Regs;
GPIO_PMD_T Bits;
}NU_GPIO_PMD_T;
//----------------------------------------------------------------------------------//
//改造GPIO为结构(不占用空间)
typedef struct
{
NU_GPIO_PMD_T PMD;//模式控制(0输入1输出2开漏3准双向)
NU_GPIO_OFFD_T OFFD;//数字使能(高16位)
NU_REG_PINs DOUT;//数据输出值(低16位)
NU_REG_PINs DMASK;//数据输出写屏蔽
NU_REG_PINs PIN;//管脚数值(低16位)
NU_REG_PINs DBEN;//防反弹使能
NU_REG_PINs IMD;//中断模式控制(0边沿触发中断1电平触发中断)
NU_REG_BITs IEN;//中断使能(高16位上升沿或高电平，低16位下降沿或低电平)
NU_REG_PINs ISRC;//中断源标志
NU_REG RESERVED[7];//保留,为了构造GPIO结构数组
} NU_GPIO_T;
//--------------------------------------------------------------------//
#define GPIOAs (*((NU_GPIO_T *) GPIOA_BASE))//定位全局结构变量GPIOAs
#define GPIOBs (*((NU_GPIO_T *) GPIOB_BASE))//定位全局结构变量GPIOBs
#define GPIOCs (*((NU_GPIO_T *) GPIOC_BASE))//定位全局结构变量GPIOCs
#define GPIODs (*((NU_GPIO_T *) GPIOD_BASE))//定位全局结构变量GPIODs
#define GPIOEs (*((NU_GPIO_T *) GPIOE_BASE))//定位全局结构变量GPIOEs
//--------------------------------------------------------------------//
#define PORTAs GPIOAs
#define PORTBs GPIOBs
#define PORTCs GPIOCs
#define PORTDs GPIODs
#define PORTEs GPIOEs
//--------------------------------------------------------------------//
#define PAs GPIOAs
#define PBs GPIOBs
#define PCs GPIOCs
#define PDs GPIODs
#define PEs GPIOEs
//--------------------------------------------------------------------//
#define GPIOx(x) ((NU_GPIO_T *) GPIOA_BASE + (x * 0x0040))
#define PORTx(x) ((NU_GPIO_T *) GPIOA_BASE + (x * 0x0040))
#define Px(x) ((NU_GPIO_T *) GPIOA_BASE + (x * 0x0040))
//--------------------------------------------------------------------//
typedef enum
{
GPIO_DBNCECON_DBCLKSEL = 0,
GPIO_DBNCECON_DBCLKSRC = 4,
GPIO_DBNCECON_ICLK_ON = 5
}NU_GPIO_DBNCECON_ENUM;
typedef volatile union
{
NU_REG Regs;
GPIO_DBNCECON_T Bits;
}NU_GPIO_DBNCECON_T;
typedef struct {
union {
__IO NU_GPIO_T Px[5];//GPIOs.Px[0].DOUT.Regs |= 1;GPIOs.Px[0].DOUT.Bits.Pin0 = 1;
struct {
__IO NU_GPIO_T PA;//GPIOs.PA.DOUT.Regs |=1;GPIOs.PA.DOUT.Bits.Pin0=1;
__IO NU_GPIO_T PB;//GPIOs.PB.DOUT.Regs |=2;GPIOs.PB.DOUT.Bits.Pin1=1;
__IO NU_GPIO_T PC;//GPIOs.PC.DOUT.Regs |=4;GPIOs.PC.DOUT.Bits.Pin2=1;
__IO NU_GPIO_T PD;//GPIOs.PD.DOUT.Regs |=8;GPIOs.PD.DOUT.Bits.Pin3=1;
__IO NU_GPIO_T PE;//GPIOs.PE.DOUT.Regs |=16;GPIOs.PE.DOUT.Bits.Pin4=1;
};
};
__I NU_REG RESERVED[16];
__IO NU_GPIO_DBNCECON_T DBNCECON;
}NUS_GPIO, *NUPS_GPIO;
#define NU_BASE_GPIO ((NUPS_GPIO) GPIOA_BASE)//定义硬件结构指针（硬件地址）
#define GPIOs (*NU_BASE_GPIO)//定位全局结构变量GPIOs
#define PORTs (*NU_BASE_GPIO)//定位全局结构变量PORTs
//-------------------------------------------------------------------------------------//
typedef enum
{
SPI_CNTRL_GO_BUSY = 0,//通讯或忙状态标志
SPI_CNTRL_RX_NEG = 1,//接收数据边沿反向位(0=SDI信号在SPICLK上升沿接收)
SPI_CNTRL_TX_NEG = 2,//发送数据边沿反向位(0=SDO信号在SPICLK的上升沿发送)
SPI_CNTRL_TX_BIT_LEN = 3,//传输位长度(32,1,...31)
SPI_CNTRL_TX_NUM = 8,//发送/接收数量(00=每次传输仅完成1次发送/接收,01=每次传输仅完成2次发送/接收)
SPI_CNTRL_LSB = 10,//优先传送LSB(0=优先发送/接收MSB,根据CNTRL寄存器的Tx_BIT_LEN 决定TxX/RxX)
SPI_CNTRL_CLKP = 11,//时钟极性(0=SCLK低电平闲置)
SPI_CNTRL_SP_CYCLE = 12,//暂缓间隙 (仅主机模式)
SPI_CNTRL_IF = 16,//中断标志(0=表示传输未结束, 该位写1清零)
SPI_CNTRL_IE = 17,//中断使能
SPI_CNTRL_SLAVE = 18,//SLAVE模式标志(0=MCU作为主机模式)
SPI_CNTRL_BYTE_REORDER = 19,
SPI_CNTRL_TWOB= 21,
SPI_CNTRL_VARCLK_EN = 22
}NU_SPI_CNTRL_ENUM;
typedef volatile union
{
NU_REG Regs;
SPI_CNTRL_T Bits;
}NU_SPI_CNTRL_T;
//-------------------------------------------------------------------------------------//
typedef enum
{
SPI_SSR_SSR = 0,//从机选择寄存器(主机模式)
SPI_SSR_SS_LVL = 2,//从机选择触发电平选择
SPI_SSR_AUTOSS = 3,//自动从机选择(主机模式)
SPI_SSR_SS_LTRIG = 4,//从机电平触发选择（从机模式）
SPI_SSR_LTRIG_FLAG = 5//电平触发标志
}NU_SPI_SSR_ENUM;
typedef volatile union
{
NU_REG Regs;
SPI_SSR_T Bits;
}NU_SPI_SSR_T;
//-------------------------------------------------------------------------------------//
typedef enum
{
SPI_DMA_TX_DMA_GO = 0,//发送DMA开始(如果采用DMA发送数据，将不会对SPI_CNTRL寄存器的GO_BUSY位置位)
SPI_DMA_RX_DMA_GO = 1//接收DMA开始
}NU_SPI_DMA_ENUM;
typedef volatile union
{
NU_REG Regs;
SPI_DMA_T Bits;
}NU_SPI_DMA_T;
//-------------------------------------------------------------------------------------//
typedef enum
{
SPI_DIVIDER_TDIVIDER = 0,
SPI_DIVIDER_TDIVIDER2 = 16
}NU_SPI_DIVIDER_ENUM;
typedef volatile union
{
NU_REG Regs;
SPI_DIVIDER_T Bits;
}NU_SPI_DIVIDER_T;
//-------------------------------------------------------------------------------------//
typedef struct
{
NU_SPI_CNTRL_T CNTRL;//控制及状态寄存器
NU_SPI_DIVIDER_T DIVIDER;//时钟除频寄存器
NU_SPI_SSR_T SSR;//从机选择寄存器
NU_REG RESERVE0;//保留
union{
NU_REG_BITs RX[2];//接收数据寄存器数组
struct{
NU_REG_BITs RX0;//接收数据寄存器低32位
NU_REG_BITs RX1;//接收数据寄存器高32位
};
};
NU_REG RESERVE1[2];//保留
union{
NU_REG_BITs TX[2];//数据发送寄存器数组
struct{
NU_REG_BITs TX0;//数据发送寄存器低32位
NU_REG_BITs TX1;//数据发送寄存器高32位
};
};
NU_REG RESERVE2[3];//保留
NU_REG_BITs VARCLK;
NU_SPI_DMA_T DMA;//SPIDMA控制寄存器
}NU_SPI_T;
//----------------------------------------------------//
#define SPI0s (*((NU_SPI_T *) SPI0_BASE))//定位全局结构变量SPI0s
#define SPI1s (*((NU_SPI_T *) SPI1_BASE))//定位全局结构变量SPI1s
#define SPI2s (*((NU_SPI_T *) SPI2_BASE))//定位全局结构变量SPI2s
#define SPI3s (*((NU_SPI_T *) SPI3_BASE))//定位全局结构变量SPI3s
//----------------------------------------------------//
#define SPIx(x) ((NU_SPI_T *) SPI0_BASE + ((x & 1) * 0x4000) + ((x >> 1) * 0x100000))
//----------------------------------------------------//
typedef enum
{
PDMA_CSR_PDMACEN = 0,//PDMA通道使能
PDMA_CSR_SW_RST = 1,//软件产生复位
PDMA_CSR_MODE_SEL = 2,//PDMA模式选择
PDMA_CSR_SAD_SEL = 4,//传输源地址方向选择
PDMA_CSR_DAD_SEL = 6,//传输目的地址方向选择
PDMA_CSR_WAR_BCR_SEL = 12,
PDMA_CSR_APB_TWS = 19,//外设传输宽度选择
PDMA_CSR_TRIG_EN = 23//PDMA数据读写传输使能(当PDMA传输完成, 该位自动清除.)
}NU_PDMA_CSR_ENUM;
typedef volatile union
{
NU_REG Regs;
PDMA_CSR_T Bits;
}NU_PDMA_CSR_T;
//----------------------------------------------------//
typedef enum
{
PDMA_CBCR_CBCR = 0
}NU_PDMA_CBCR_ENUM;
typedef volatile union
{
NU_REG Regs;
PDMA_CBCR_T Bits;
}NU_PDMA_CBCR_T;
//----------------------------------------------------//
typedef enum
{
PDMA_IER_TABORT_IE = 0,//读写异常使能
PDMA_IER_BLKD_IE = 1,//Transfer Done中断使能
PDMA_IER_WAR_IE = 2//Wrap Around中断使能
}NU_PDMA_IER_ENUM;
typedef volatile union
{
NU_REG Regs;
PDMA_IER_T Bits;
}NU_PDMA_IER_T;
//----------------------------------------------------//
typedef enum
{
PDMA_ISR_TABORT_IF = 0,//PDMA 读/写 目标异常中断标志位
PDMA_ISR_BLKD_IF = 1,//Block 传递完成 中断标志位
PDMA_ISR_WAR_BCR_IF= 8,//Wrap around传递字节计时器中断标志位
PDMA_ISR_INTR = 31//中断管脚状态(只读)
}NU_PDMA_ISR_ENUM;
typedef volatile union
{
NU_REG Regs;
PDMA_ISR_T Bits;
}NU_PDMA_ISR_T;
//----------------------------------------------------//
typedef struct
{
NU_PDMA_CSR_T CSR;//控制寄存器
NU_REG_BITs SAR;//源地址寄存器
NU_REG_BITs DAR;//目的地址寄存器
NU_REG_BITs BCR;//发送字节计数寄存器
NU_REG_BITs POINT;//内部数据指示器
NU_REG_BITs CSAR;//当前源目的地址
NU_REG_BITs CDAR;//当前目的地址寄存器
NU_PDMA_CBCR_T CBCR;//当前传输字节计数寄存器
NU_PDMA_IER_T IER;//中断使能寄存器
NU_PDMA_ISR_T ISR;//中断状态寄存器
union{
NU_REG_BITs SBUF[4];//共享缓冲FIFO
struct{
NU_REG_BITs SBUF0;//共享缓冲FIFO
NU_REG_BITs SBUF1;//共享缓冲FIFO
NU_REG_BITs SBUF2;//共享缓冲FIFO
NU_REG_BITs SBUF3;//共享缓冲FIFO
};
};
}NU_PDMA_T;
//----------------------------------------------------//
#define PDMA0s (*((NU_PDMA_T *) PDMA0_BASE))//定位全局结构变量PDMA0s
#define PDMA1s (*((NU_PDMA_T *) PDMA1_BASE))//定位全局结构变量PDMA1s
#define PDMA2s (*((NU_PDMA_T *) PDMA2_BASE))//定位全局结构变量PDMA2s
#define PDMA3s (*((NU_PDMA_T *) PDMA3_BASE))//定位全局结构变量PDMA3s
#define PDMA4s (*((NU_PDMA_T *) PDMA4_BASE))//定位全局结构变量PDMA4s
#define PDMA5s (*((NU_PDMA_T *) PDMA5_BASE))//定位全局结构变量PDMA5s
#define PDMA6s (*((NU_PDMA_T *) PDMA6_BASE))//定位全局结构变量PDMA6s
#define PDMA7s (*((NU_PDMA_T *) PDMA7_BASE))//定位全局结构变量PDMA7s
#define PDMA8s (*((NU_PDMA_T *) PDMA8_BASE))//定位全局结构变量PDMA8s
//----------------------------------------------------//
#define PDMAx(x) ((NU_PDMA_T *) PDMA0_BASE + (x * 0x0100))
//----------------------------------------------------//
typedef struct {
union {
__IO NU_PDMA_T CHx[16];
struct {
__IO NU_PDMA_T CH0;
__IO NU_PDMA_T CH1;
__IO NU_PDMA_T CH2;
__IO NU_PDMA_T CH3;
__IO NU_PDMA_T CH4;
__IO NU_PDMA_T CH5;
__IO NU_PDMA_T CH6;
__IO NU_PDMA_T CH7;
__IO NU_PDMA_T CH8;
__IO NU_PDMA_T RESERVE[7];
};
};
}NUS_PDMA, *NUPS_PDMA;
//----------------------------------------------------//
#define NU_BASE_PDMA ((NUPS_PDMA) PDMA0_BASE)//定义硬件结构指针（硬件地址）
#define PDMAs (*NU_BASE_PDMA)//定位全局结构变量PDMAs
//----------------------------------------------------//
typedef enum
{
TIMER_TCSR_PRESCALE = 0,//预分频计数器
TIMER_TCSR_TDR_EN = 16,//数据锁存使能
TIMER_TCSR_COUNTER_EN = 24,//
TIMER_TCSR_CACT = 25,//定时器工作状态
TIMER_TCSR_CRST = 26,//计数器重置
TIMER_TCSR_MODE = 27,//定时器工作模式
TIMER_TCSR_TMR_IE = 29,//中断使能
TIMER_TCSR_CEN = 30,//计数器使能位
TIMER_TCSR_nDBGACK_EN = 31
}NU_TIMER_TCSR_ENUM;
typedef volatile union
{
NU_REG Regs;
TIMER_TCSR_T Bits;
}NU_TIMER_TCSR_T;
//----------------------------------------------------//
typedef enum
{
TIMER_TISR_TIF = 0//定时器中断标志
}NU_TIMER_TISR_T_ENUM;
typedef volatile union
{
NU_REG Regs;
TIMER_TISR_T Bits;
}NU_TIMER_TISR_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_TIMER_TCSR_T TCSR;//控制与状态寄存器
__IO NU_REG_BITs TCMPR;//比较寄存器
__IO NU_TIMER_TISR_T TISR;//中断状态寄存器
__IO NU_REG_BITs TDR;//数据寄存器
}NU_TIMER_T;
//----------------------------------------------------//
#define TIMER0s (*((NU_TIMER_T *) TIMER0_BASE))//定位全局结构变量TIMER0s
#define TIMER1s (*((NU_TIMER_T *) TIMER1_BASE))//定位全局结构变量TIMER1s
#define TIMER2s (*((NU_TIMER_T *) TIMER2_BASE))//定位全局结构变量TIMER2s
#define TIMER3s (*((NU_TIMER_T *) TIMER3_BASE))//定位全局结构变量TIMER3s
//----------------------------------------------------//
#define TIMERx(x) ((NU_TIMER_T *)TIMER0_BASE + ((x & 1) * 0x0020) + ((x >> 1) * 0x100000))
//----------------------------------------------------//
typedef enum
{
I2C_START = 0x08, //已发送起始条件
I2C_REP_START = 0x10, //已发送重复起始条件
/* Master Transmitter */ //主发送器模式
I2C_MT_SLA_ACK = 0x18, //已发送SLA+W,且已接收ACK
I2C_MT_SLA_NACK = 0x20, //已发送SLA+W,且未接收ACK
I2C_MT_DATA_ACK = 0x28, //已发送I2DAT 中的数据字节，且已接收ACK
I2C_MT_DATA_NACK = 0x30, //已发送I2DAT 中的数据字节，且未接收ACK
I2C_MT_ARB_LOST = 0x38,
/* Master Receiver */ //主接收器模式
I2C_MR_ARB_LOST = 0x38,
I2C_MR_SLA_ACK = 0x40, //已发送SLA+R,且已接收ACK
I2C_MR_SLA_NACK = 0x48, //已发送SLA+R,且未接收ACK
I2C_MR_DATA_ACK = 0x50,
I2C_MR_DATA_NACK = 0x58,
/* Slave Transmitter */
I2C_ST_SLA_ACK = 0xA8,
I2C_ST_ARB_LOST_SLA_ACK = 0xB0,
I2C_ST_DATA_ACK = 0xB8,
I2C_ST_DATA_NACK = 0xC0,
I2C_ST_LAST_DATA = 0xC8,
/* Slave Receiver */
I2C_SR_SLA_ACK = 0x60,
I2C_SR_ARB_LOST_SLA_ACK = 0x68,
I2C_SR_GCALL_ACK = 0x70,
I2C_SR_ARB_LOST_GCALL_ACK = 0x78,
I2C_SR_DATA_ACK = 0x80,
I2C_SR_DATA_NACK = 0x88,
I2C_SR_GCALL_DATA_ACK = 0x90,
I2C_SR_GCALL_DATA_NACK = 0x98,
I2C_SR_STOP = 0xA0,
/* Misc */
I2C_NO_INFO = 0xF8,
I2C_BUS_ERROR = 0x00,
I2C_BUS_OK = 0xFF
}NU_I2C_STATUS_ENUM;
//----------------------------------------------------//
typedef enum
{
I2C_CON_AA = 2,//I2C接收应答标志位
I2C_CON_SI = 3,//I2C中断标志位
I2C_CON_STO = 4,//I2C停止标志
I2C_CON_STA = 5,//I2C起始标志
I2C_CON_ENSI = 6,//I2C控制使能/禁止
I2C_CON_EI = 7 //使能中断
}NU_I2C_CON_ENUM;
typedef volatile union
{
NU_REG Regs;
I2C_CON_T Bits;
}NU_I2C_CON_T;
//----------------------------------------------------//
typedef enum
{
I2C_ADDR_GC = 0,//全呼功能
I2C_ADDR_ADDR = 1 //I2C地址寄存器
}NU_I2C_ADDR_ENUM;
typedef volatile union
{
NU_REG Regs;
I2C_ADDR_T Bits;
}NU_I2C_ADDR_T;
//----------------------------------------------------//
typedef enum
{
I2C_ADRM_ADM = 1 //I2C隐藏地址寄存器
}NU_I2C_ADRM_ENUM;
typedef volatile union
{
NU_REG Regs;
I2C_ADRM_T Bits;
}NU_I2C_ADRM_T;
//----------------------------------------------------//
typedef enum
{
I2C_TOC_TIF = 0,//超时标志
I2C_TOC_DIV4 = 1,//超时计数输入时钟除4
I2C_TOC_ENTI = 2 //超时计数使能/禁止
}NU_I2C_TOC_NUM;
typedef volatile union
{
NU_REG Regs;
I2C_TOC_T Bits;
}NU_I2C_TOC_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_I2C_CON_T CON;//I2C控制寄存器
__IO NU_I2C_ADDR_T ADDR0;//I2C从机地址寄存器0
__IO NU_REG_BITs DATA;//I2C数据寄存器
__IO NU_REG_BITs STATUS;//I2C状态寄存器
__IO NU_REG_BITs CLK;//I2C时钟时钟分频寄存器
__IO NU_I2C_TOC_T TOC;//I2C超时控制寄存器
__IO NU_I2C_ADDR_T ADDR1;//从机地址寄存器1
__IO NU_I2C_ADDR_T ADDR2;//从机地址寄存器2
__IO NU_I2C_ADDR_T ADDR3;//从机地址寄存器3
__IO NU_I2C_ADRM_T ADRM0;//从机隐藏地址寄存器0
__IO NU_I2C_ADRM_T ADRM1;//从机隐藏地址寄存器1
__IO NU_I2C_ADRM_T ADRM2;//从机隐藏地址寄存器2
__IO NU_I2C_ADRM_T ADRM3;//从机隐藏地址寄存器3
__IO NU_REG RESERVE[((I2C1_BASE - I2C0_BASE) - sizeof(I2C_T)) / sizeof(NU_REG)];
}NU_I2C_T;
//----------------------------------------------------//
#define I2C0s (*((NU_I2C_T *) I2C0_BASE))//定位全局结构变量I2C0s
#define I2C1s (*((NU_I2C_T *) I2C1_BASE))//定位全局结构变量I2C0s
//----------------------------------------------------//
#define I2Cx(x) ((NU_I2C_T *) I2C0_BASE + (x * 0x100000))
//----------------------------------------------------//
typedef struct {
union {
__IO NU_I2C_T PORT[2];
struct {
__IO NU_I2C_T PORT0;
__IO NU_I2C_T PORT1;
};
};
}NUS_I2C, *NUPS_I2C;
//----------------------------------------------------//
#define NU_BASE_I2C ((NUPS_I2C) I2C0_BASE)//定义硬件结构指针（硬件地址）
#define I2Cs (*NU_BASE_I2C)//定位全局结构变量I2Cs
//----------------------------------------------------//
typedef enum
{
PWM_PPR_CP01 = 0,//PWM定时器0&1的时钟预分频
PWM_PPR_CP23 = 8,//PWM定时器2&3的时钟预分频
PWM_PPR_DZI01 = 16,//PWM0与PWM1的死区间隔寄存器
PWM_PPR_DZI23 = 24,//PWM2与PWM3的死区间隔寄存器
PWM_PPR_CP45 = 0,//PWM定时器4&5的时钟预分频
PWM_PPR_CP67 = 8,//PWM定时器6&7的时钟预分频
PWM_PPR_DZI45 = 16,//PWM4与PWM5的死区间隔寄存器
PWM_PPR_DZI67 = 24//PWM6与PWM7的死区间隔寄存器
}NU_PWM_PPR_ENUM;
typedef enum
{
PWM_PPR03_CP01 = 0,//PWM定时器0&1的时钟预分频0
PWM_PPR03_CP23 = 8,//PWM定时器2&3的时钟预分频2
PWM_PPR03_DZI01 = 16,//PWM0与PWM1的死区间隔寄存器
PWM_PPR03_DZI23 = 24//PWM2与PWM3的死区间隔寄存器
}NU_PWM_PPR03_ENUM;
typedef volatile union
{
NU_REG Regs;
PWM_PPR_T Bits;
}NU_PWM_PPR_T;
//----------------------------------------------------//
typedef enum
{
PWM_PPR47_CP45 = 0,//PWM定时器4&5的时钟预分频0
PWM_PPR47_CP67 = 8,//PWM定时器6&7的时钟预分频2
PWM_PPR47_DZI45 = 16,//PWM4与PWM5的死区间隔寄存器
PWM_PPR47_DZI67 = 24//PWM6与PWM7的死区间隔寄存器
}NU_PWM_PPR47_ENUM;
typedef struct
{
__IO NU_REG CP45:8;
__IO NU_REG CP67:8;
__IO NU_REG DZI45:8;
__IO NU_REG DZI67:8;
}NU_PWM_PPR_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_PPR_Bits Bits;
}NU_PWM_PPR47_T;
//----------------------------------------------------//
typedef enum
{
PWM_CSR_CSR0 = 0,//定时器0时钟源选择
PWM_CSR_CSR1 = 4,//定时器1时钟源选择
PWM_CSR_CSR2 = 8,//定时器2时钟源选择
PWM_CSR_CSR3 = 12,//定时器3时钟源选择
PWM_CSR_CSR4 = 0,//定时器4时钟源选择
PWM_CSR_CSR5 = 4,//定时器5时钟源选择
PWM_CSR_CSR6 = 8,//定时器6时钟源选择
PWM_CSR_CSR7 = 12//定时器7时钟源选择
}NU_PWM_CSR_ENUM;
typedef enum
{
PWM_CSR03_CSR0 = 0,//定时器0时钟源选择
PWM_CSR03_CSR1 = 4,//定时器1时钟源选择
PWM_CSR03_CSR2 = 8,//定时器2时钟源选择
PWM_CSR03_CSR3 = 12//定时器3时钟源选择
}NU_PWM_CSR03_ENUM;
typedef volatile union
{
NU_REG Regs;
PWM_CSR_T Bits;
}NU_PWM_CSR_T;
//----------------------------------------------------//
typedef enum
{
PWM_CSR47_CSR4 = 0,//定时器4时钟源选择
PWM_CSR47_CSR5 = 4,//定时器5时钟源选择
PWM_CSR47_CSR6 = 8,//定时器6时钟源选择
PWM_CSR47_CSR7 = 12//定时器7时钟源选择
}NU_PWM_CSR47_ENUM;
typedef struct
{
__IO NU_REG CSR4:3;
__I NU_REG RESERVE0:1;
__IO NU_REG CSR5:3;
__I NU_REG RESERVE1:1;
__IO NU_REG CSR6:3;
__I NU_REG RESERVE2:1;
__IO NU_REG CSR7:3;
__I NU_REG RESERVE3:17;
}NU_PWM_CSR47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_CSR47_Bits Bits;
}NU_PWM_CSR47_T;
//----------------------------------------------------//
typedef enum
{
PWM_PCR_CH0EN = 0,//PWM定时器0使能/禁止
PWM_PCR_CH0INV = 2,//PWM定时器0反向打开/关闭
PWM_PCR_CH0MOD = 3,//PWM定时器0自动加载/单触发模式选择
PWM_PCR_DZEN01 = 4,//死区发生器0使能/禁止
PWM_PCR_DZEN23 = 5,//死区发生器2使能/禁止
PWM_PCR_CH1EN = 8,//PWM定时器1使能/禁止
PWM_PCR_CH1INV = 10,//PWM定时器1反向打开/关闭
PWM_PCR_CH1MOD = 11,//PWM定时器1自动重载/单触发模式选择
PWM_PCR_CH2EN = 16,//PWM定时器2使能/禁止
PWM_PCR_CH2INV = 18,//PWM定时器2反向打开/关闭
PWM_PCR_CH2MOD = 19,//PWM定时器2自动重载/单触发模式选择
PWM_PCR_CH3EN = 24,//PWM定时器3使能/禁止
PWM_PCR_CH3INV = 26,//PWM定时器3反向打开/关闭
PWM_PCR_CH3MOD = 27,//PWM定时器3自动重载/单触发模式选择
PWM_PCR_CH4EN = 0,//PWM定时器4使能/禁止
PWM_PCR_CH4INV = 2,//PWM定时器4反向打开/关闭
PWM_PCR_CH4MOD = 3,//PWM定时器4自动加载/单触发模式选择
PWM_PCR_DZEN45 = 4,//死区发生器4使能/禁止
PWM_PCR_DZEN67 = 5,//死区发生器6使能/禁止
PWM_PCR_CH5EN = 8,//PWM定时器5使能/禁止
PWM_PCR_CH5INV = 10,//PWM定时器5反向打开/关闭
PWM_PCR_CH5MOD = 11,//PWM定时器5自动重载/单触发模式选择
PWM_PCR_CH6EN = 16,//PWM定时器6使能/禁止
PWM_PCR_CH6INV = 18,//PWM定时器6反向打开/关闭
PWM_PCR_CH6MOD = 19,//PWM定时器6自动重载/单触发模式选择
PWM_PCR_CH7EN = 24,//PWM定时器7使能/禁止
PWM_PCR_CH7INV = 26,//PWM定时器7反向打开/关闭
PWM_PCR_CH7MOD = 27,//PWM定时器7自动重载/单触发模式选择
}NU_PWM_PCR_ENUM;
typedef enum
{
PWM_PCR03_CH0EN = 0,//PWM定时器0使能/禁止
PWM_PCR03_CH0INV = 2,//PWM定时器0反向打开/关闭
PWM_PCR03_CH0MOD = 3,//PWM定时器0自动加载/单触发模式选择
PWM_PCR03_DZEN01 = 4,//死区发生器0使能/禁止
PWM_PCR03_DZEN23 = 5,//死区发生器2使能/禁止
PWM_PCR03_CH1EN = 8,//PWM定时器1使能/禁止
PWM_PCR03_CH1INV = 10,//PWM定时器1反向打开/关闭
PWM_PCR03_CH1MOD = 11,//PWM定时器1自动重载/单触发模式选择
PWM_PCR03_CH2EN = 16,//PWM定时器2使能/禁止
PWM_PCR03_CH2INV = 18,//PWM定时器2反向打开/关闭
PWM_PCR03_CH2MOD = 19,//PWM定时器2自动重载/单触发模式选择
PWM_PCR03_CH3EN = 24,//PWM定时器3使能/禁止
PWM_PCR03_CH3INV = 26,//PWM定时器3反向打开/关闭
PWM_PCR03_CH3MOD = 27,//PWM定时器3自动重载/单触发模式选择
}NU_PWM_PCR03_ENUM;
typedef volatile union
{
NU_REG Regs;
PWM_PCR_T Bits;
}NU_PWM_PCR_T;
//----------------------------------------------------//
typedef enum
{
PWM_PCR47_CH4EN = 0,//PWM定时器4使能/禁止
PWM_PCR47_CH4INV = 2,//PWM定时器4反向打开/关闭
PWM_PCR47_CH4MOD = 3,//PWM定时器4自动加载/单触发模式选择
PWM_PCR47_DZEN45 = 4,//死区发生器4使能/禁止
PWM_PCR47_DZEN67 = 5,//死区发生器6使能/禁止
PWM_PCR47_CH5EN = 8,//PWM定时器5使能/禁止
PWM_PCR47_CH5INV = 10,//PWM定时器5反向打开/关闭
PWM_PCR47_CH5MOD = 11,//PWM定时器5自动重载/单触发模式选择
PWM_PCR47_CH6EN = 16,//PWM定时器6使能/禁止
PWM_PCR47_CH6INV = 18,//PWM定时器6反向打开/关闭
PWM_PCR47_CH6MOD = 19,//PWM定时器6自动重载/单触发模式选择
PWM_PCR47_CH7EN = 24,//PWM定时器7使能/禁止
PWM_PCR47_CH7INV = 26,//PWM定时器7反向打开/关闭
PWM_PCR47_CH7MOD = 27,//PWM定时器7自动重载/单触发模式选择
}NU_PWM_PCR47_ENUM;
typedef struct
{
__IO NU_REG CH4EN:1;
__I NU_REG RESERVE0:1;
__IO NU_REG CH4INV:1;
__IO NU_REG CH4MOD:1;
__IO NU_REG DZEN45:1;
__IO NU_REG DZEN67:1;
__I NU_REG RESERVE1:2;
__IO NU_REG CH5EN:1;
__I NU_REG RESERVE2:1;
__IO NU_REG CH5INV:1;
__IO NU_REG CH5MOD:1;
__I NU_REG RESERVE3:4;
__IO NU_REG CH6EN:1;
__I NU_REG RESERVE4:1;
__IO NU_REG CH6INV:1;
__IO NU_REG CH6MOD:1;
__I NU_REG RESERVE5:4;
__IO NU_REG CH7EN:1;
__I NU_REG RESERVE6:1;
__IO NU_REG CH7INV:1;
__IO NU_REG CH7MOD:1;
__I NU_REG RESERVE7:4;
}NU_PWM_PCR47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_PCR47_Bits Bits;
}NU_PWM_PCR47_T;
//----------------------------------------------------//
typedef enum
{
PWM_PBCR_BCn = 0
}NU_PWM_PBCR_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_PBCR_T Bits;
}NU_PWM_PBCR_T;
//----------------------------------------------------//
typedef enum
{
PWM_PIER_PWMIE0 = 0,//PWM定时器0中断使能
PWM_PIER_PWMIE1 = 1,//PWM定时器1中断使能
PWM_PIER_PWMIE2 = 2,//PWM定时器2中断使能
PWM_PIER_PWMIE3 = 3, //PWM定时器3中断使能
PWM_PIER_PWMIE4 = 0,//PWM定时器4中断使能
PWM_PIER_PWMIE5 = 1,//PWM定时器5中断使能
PWM_PIER_PWMIE6 = 2,//PWM定时器6中断使能
PWM_PIER_PWMIE7 = 3 //PWM定时器7中断使能
}NU_PWM_PIER_NUM;
typedef enum
{
PWM_PIER03_PWMIE0 = 0,//PWM定时器0中断使能
PWM_PIER03_PWMIE1 = 1,//PWM定时器1中断使能
PWM_PIER03_PWMIE2 = 2,//PWM定时器2中断使能
PWM_PIER03_PWMIE3 = 3 //PWM定时器3中断使能
}NU_PWM_PIER03_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_PIER_T Bits;
}NU_PWM_PIER_T;
//----------------------------------------------------//
typedef enum
{
PWM_PIER47_PWMIE4 = 0,//PWM定时器4中断使能
PWM_PIER47_PWMIE5 = 1,//PWM定时器5中断使能
PWM_PIER47_PWMIE6 = 2,//PWM定时器6中断使能
PWM_PIER47_PWMIE7 = 3 //PWM定时器7中断使能
}NU_PWM_PIER47_NUM;
typedef struct
{
__IO NU_REG PWMIE4:1;
__IO NU_REG PWMIE5:1;
__IO NU_REG PWMIE6:1;
__IO NU_REG PWMIE7:1;
__I NU_REG RESERVE:28;
}NU_PWM_PIER47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_PIER47_Bits Bits;
}NU_PWM_PIER47_T;
//----------------------------------------------------//
typedef enum
{
PWM_PIIR_PWMIF0 = 0,//PWM定时器0中断标志
PWM_PIIR_PWMIF1 = 1,//PWM定时器1中断标志
PWM_PIIR_PWMIF2 = 2,//PWM定时器2中断标志
PWM_PIIR_PWMIF3 = 3,//PWM定时器3中断标志
PWM_PIIR_PWMIF4 = 0,//PWM定时器4中断标志
PWM_PIIR_PWMIF5 = 1,//PWM定时器5中断标志
PWM_PIIR_PWMIF6 = 2,//PWM定时器6中断标志
PWM_PIIR_PWMIF7 = 3 //PWM定时器7中断标志
}NU_PWM_PIIR_NUM;
typedef enum
{
PWM_PIIR03_PWMIF0 = 0,//PWM定时器0中断标志
PWM_PIIR03_PWMIF1 = 1,//PWM定时器1中断标志
PWM_PIIR03_PWMIF2 = 2,//PWM定时器2中断标志
PWM_PIIR03_PWMIF3 = 3 //PWM定时器3中断标志
}NU_PWM_PIIR03_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_PIIR_T Bits;
}NU_PWM_PIIR_T;
//----------------------------------------------------//
typedef enum
{
PWM_PIIR47_PWMIF4 = 0,//PWM定时器4中断标志
PWM_PIIR47_PWMIF5 = 1,//PWM定时器5中断标志
PWM_PIIR47_PWMIF6 = 2,//PWM定时器6中断标志
PWM_PIIR47_PWMIF7 = 3 //PWM定时器7中断标志
}NU_PWM_PIIR47_NUM;
typedef struct
{
__IO NU_REG PWMIF5:1;
__IO NU_REG PWMIF6:1;
__IO NU_REG PWMIF7:1;
__IO NU_REG PWMIF8:1;
__I NU_REG RESERVE:28;
}NU_PWM_PIIR47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_PIIR47_Bits Bits;
}NU_PWM_PIIR47_T;
//----------------------------------------------------//
typedef enum
{
PWM_CCR0_INV0 = 0,//通道0反向打开/关闭
PWM_CCR0_CRL_IE0 = 1,//通道0向上计数中断使能
PWM_CCR0_CFL_IE0 = 2,//通道0向下计数中断使能
PWM_CCR0_CAPCH0EN = 3,//捕捉器通道0传输使能/禁止
PWM_CCR0_CAPIF0 = 4,//捕捉器0中断标志
PWM_CCR0_CRLRI0 = 6,//捕捉器通道0传输使能/禁止
PWM_CCR0_CFLRI0 = 7,//CFLR0锁定方向标志位
PWM_CCR0_INV1 = 16,//通道1反向打开/关闭
PWM_CCR0_CRL_IE1 = 17,//通道1向上计数中断使能
PWM_CCR0_CFL_IE1 = 18,//通道1向下计数中断使能
PWM_CCR0_CAPCH1EN = 19,//捕捉器通道1传输使能/禁止
PWM_CCR0_CAPIF1 = 20,//捕捉器1中断标志
PWM_CCR0_CRLRI1 = 22,//CRLR1锁定方向标志位
PWM_CCR0_CFLRI1 = 23//CFLR1锁定方向标志位
}NU_PWM_CCR0_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_CCR0_T Bits;
}NU_PWM_CCR0_T;
//----------------------------------------------------//
typedef enum
{
PWM_CCR4_INV4 = 0,//通道4反向打开/关闭
PWM_CCR4_CRL_IE4 = 1,//通道4向上计数中断使能
PWM_CCR4_CFL_IE4 = 2,//通道4向下计数中断使能
PWM_CCR4_CAPCH4EN = 3,//捕捉器通道4传输使能/禁止
PWM_CCR4_CAPIF4 = 4,//捕捉器4中断标志
PWM_CCR4_CRLRI4 = 6,//捕捉器通道4传输使能/禁止
PWM_CCR4_CFLRI4 = 7,//CFLR4锁定方向标志位
PWM_CCR4_INV5 = 16,//通道5反向打开/关闭
PWM_CCR4_CRL_IE5 = 17,//通道5向上计数中断使能
PWM_CCR4_CFL_IE5 = 18,//通道5向下计数中断使能
PWM_CCR4_CAPCH5EN = 19,//捕捉器通道1传输使能/禁止
PWM_CCR4_CAPIF5 = 20,//捕捉器5中断标志
PWM_CCR4_CRLRI5 = 22,//CRLR5锁定方向标志位
PWM_CCR4_CFLRI5 = 23//CFLR5锁定方向标志位
}NU_PWM_CCR4_NUM;
typedef struct
{
__IO NU_REG INV4:1;
__IO NU_REG CRL_IE4:1;
__IO NU_REG CFL_IE4:1;
__IO NU_REG CAPCH4EN:1;
__IO NU_REG CAPIF4:1;
__I NU_REG RESERVE4:1;
__IO NU_REG CRLRI4:1;
__IO NU_REG CFLRI4:1;
__I NU_REG RESERVE1:8;
__IO NU_REG INV5:1;
__IO NU_REG CRL_IE5:1;
__IO NU_REG CFL_IE5:1;
__IO NU_REG CAPCH5EN:1;
__IO NU_REG CAPIF5:1;
__I NU_REG RESERVE2:1;
__IO NU_REG CRLRI5:1;
__IO NU_REG CFLRI5:1;
__I NU_REG RESERVE3:8;
}NU_PWM_CCR4_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_CCR4_Bits Bits;
}NU_PWM_CCR4_T;
//----------------------------------------------------//
typedef enum
{
PWM_CCR2_INV2 = 0,//通道2反向打开/关闭
PWM_CCR2_CRL_IE2 = 1,//通道2向上计数中断使能
PWM_CCR2_CFL_IE2 = 2,//通道2向下计数中断使能
PWM_CCR2_CAPCH2EN = 3,//捕捉器通道2传输使能/禁止
PWM_CCR2_CAPIF2 = 4,//捕捉器2中断标志
PWM_CCR2_CRLRI2 = 6,//CRLR2锁定方向标志位
PWM_CCR2_CFLRI2 = 7,//CFLR2锁定方向标志位
PWM_CCR2_INV3 = 16,//通道3反向打开/关闭
PWM_CCR2_CRL_IE3 = 17,//通道3向上计数中断使能
PWM_CCR2_CFL_IE3 = 18,//通道3向下计数中断使能
PWM_CCR2_CAPCH3EN = 19,//捕捉器通道3传输使能/禁止
PWM_CCR2_CAPIF3 = 20,//捕捉器3中断标志
PWM_CCR2_CRLRI3 = 22,//CRLR3锁定方向标志位
PWM_CCR2_CFLRI3 = 23//CFLR3锁定方向标志位
}NU_PWM_CCR2_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_CCR2_T Bits;
}NU_PWM_CCR2_T;
//----------------------------------------------------//
typedef enum
{
PWM_CCR6_INV6 = 0,//通道6反向打开/关闭
PWM_CCR6_CRL_IE6 = 1,//通道6向上计数中断使能
PWM_CCR6_CFL_IE6 = 2,//通道6向下计数中断使能
PWM_CCR6_CAPCH6EN = 3,//捕捉器通道6传输使能/禁止
PWM_CCR6_CAPIF6 = 4,//捕捉器6中断标志
PWM_CCR6_CRLRI6 = 6,//捕捉器通道6传输使能/禁止
PWM_CCR6_CFLRI6 = 7,//CFLR6锁定方向标志位
PWM_CCR6_INV7 = 16,//通道7反向打开/关闭
PWM_CCR6_CRL_IE7 = 17,//通道7向上计数中断使能
PWM_CCR6_CFL_IE7 = 18,//通道7向下计数中断使能
PWM_CCR6_CAPCH7EN = 19,//捕捉器通道7传输使能/禁止
PWM_CCR6_CAPIF7 = 20,//捕捉器7中断标志
PWM_CCR6_CRLRI7 = 22,//CRLR7锁定方向标志位
PWM_CCR6_CFLRI7 = 23//CFLR7锁定方向标志位
}NU_PWM_CCR6_NUM;
typedef struct
{
__IO NU_REG INV6:1;
__IO NU_REG CRL_IE6:1;
__IO NU_REG CFL_IE6:1;
__IO NU_REG CAPCH6EN:1;
__IO NU_REG CAPIF6:1;
__I NU_REG RESERVE4:1;
__IO NU_REG CRLRI6:1;
__IO NU_REG CFLRI6:1;
__I NU_REG RESERVE1:8;
__IO NU_REG INV7:1;
__IO NU_REG CRL_IE7:1;
__IO NU_REG CFL_IE7:1;
__IO NU_REG CAPCH7EN:1;
__IO NU_REG CAPIF7:1;
__I NU_REG RESERVE2:1;
__IO NU_REG CRLRI7:1;
__IO NU_REG CFLRI7:1;
__I NU_REG RESERVE3:8;
}NU_PWM_CCR6_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_CCR6_Bits Bits;
}NU_PWM_CCR6_T;
//----------------------------------------------------//
typedef enum
{
PWM_POE_PWM0 = 0,//PWM0输出使能寄存器
PWM_POE_PWM1 = 1,//PWM1输出使能寄存器
PWM_POE_PWM2 = 2,//PWM2输出使能寄存器
PWM_POE_PWM3 = 3,//PWM3输出使能寄存器
PWM_POE_PWM4 = 0,//PWM4输出使能寄存器
PWM_POE_PWM5 = 1,//PWM5输出使能寄存器
PWM_POE_PWM6 = 2,//PWM6输出使能寄存器
PWM_POE_PWM7 = 3 //PWM7输出使能寄存器
}NU_PWM_POE_NUM;
typedef enum
{
PWM_POE03_PWM0 = 0,//PWM0输出使能寄存器
PWM_POE03_PWM1 = 1,//PWM1输出使能寄存器
PWM_POE03_PWM2 = 2,//PWM2输出使能寄存器
PWM_POE03_PWM3 = 3 //PWM3输出使能寄存器
}NU_PWM_POE03_NUM;
typedef volatile union
{
NU_REG Regs;
PWM_POE_T Bits;
}NU_PWM_POE_T;
//----------------------------------------------------//
typedef enum
{
PWM_POE47_PWM4 = 0,//PWM4输出使能寄存器
PWM_POE47_PWM5 = 1,//PWM5输出使能寄存器
PWM_POE47_PWM6 = 2,//PWM6输出使能寄存器
PWM_POE47_PWM7 = 3 //PWM7输出使能寄存器
}NU_PWM_POE47_NUM;
typedef struct
{
__IO NU_REG PWM4:1;
__IO NU_REG PWM5:1;
__IO NU_REG PWM6:1;
__IO NU_REG PWM7:1;
__I NU_REG RESERVE:28;
}NU_PWM_POE47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_POE47_Bits Bits;
}NU_PWM_POE47_T;
//----------------------------------------------------//
typedef enum
{
PWM_CAPENR_PWM0_PA12 = 0,//捕捉通道0从GPA12输入
PWM_CAPENR_PWM1_PA13 = 1,//捕捉通道1从GPA13输入
PWM_CAPENR_PWM2_PA14 = 2,//捕捉通道2从GPA14输入
PWM_CAPENR_PWM3_PA15 = 3,//捕捉通道3从GPA15输入
PWM_CAPENR_PWM4_PA11 = 0,//捕捉通道4从GPA11输入
PWM_CAPENR_PWM5_PA5 = 1,//捕捉通道5从GPA5输入
PWM_CAPENR_PWM6_PA0 = 2,//捕捉通道6从GPA0输入
PWM_CAPENR_PWM7_PA1 = 3 //捕捉通道7从GPA1输入
}NU_PWM_CAPENR_NUM;
typedef enum
{
PWM_CAPENR03_PWM0_PA12 = 0,//捕捉通道0从GPA12输入
PWM_CAPENR03_PWM1_PA13 = 1,//捕捉通道1从GPA13输入
PWM_CAPENR03_PWM2_PA14 = 2,//捕捉通道2从GPA14输入
PWM_CAPENR03_PWM3_PA15 = 3 //捕捉通道3从GPA15输入
}NU_PWM_CAPENR03_NUM;
typedef struct
{
__IO NU_REG PWM0_PA12:1;
__IO NU_REG PWM1_PA13:1;
__IO NU_REG PWM2_PA14:1;
__IO NU_REG PWM3_PA15:1;
__I NU_REG RESERVE:28;
}NU_PWM_CAPENR03_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_CAPENR03_Bits Bits;
}NU_PWM_CAPENR03_T;
//----------------------------------------------------//
typedef enum
{
PWM_CAPENR47_PWM4_PA11 = 0,//捕捉通道4从GPA11输入
PWM_CAPENR47_PWM5_PA5 = 1,//捕捉通道5从GPA5输入
PWM_CAPENR47_PWM6_PA0 = 2,//捕捉通道6从GPA0输入
PWM_CAPENR47_PWM7_PA1 = 3 //捕捉通道7从GPA1输入
}NU_PWM_CAPENR47_NUM;
typedef struct
{
__IO NU_REG PWM4_PA11:1;
__IO NU_REG PWM5_PA5:1;
__IO NU_REG PWM6_PA0:1;
__IO NU_REG PWM7_PA1:1;
__I NU_REG RESERVE:28;
}NU_PWM_CAPENR47_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PWM_CAPENR47_Bits Bits;
}NU_PWM_CAPENR47_T;
//----------------------------------------------------//
typedef struct
{
union{
__IO NU_PWM_PPR_T PPR;//PWM0~3或PWM4~7预分频寄存器
__IO NU_PWM_PPR_T PPR03;//PWM0~3预分频寄存器
__IO NU_PWM_PPR47_T PPR47;//PWM4~7预分频寄存器
};
union{
__IO NU_PWM_CSR_T CSR;//PWM0~3或PWM4~7时钟选择寄存器
__IO NU_PWM_CSR_T CSR03;//PWM0~3时钟选择寄存器
__IO NU_PWM_CSR47_T CSR47;//PWM4~7时钟选择寄存器
};
union{
__IO NU_PWM_PCR_T PCR;//PWM0~3或PWM4~7控制寄存器
__IO NU_PWM_PCR_T PCR03;//PWM0~3控制寄存器
__IO NU_PWM_PCR47_T PCR47;//PWM4~7控制寄存器
};
union{
__IO NU_REG_BITs CNR0;//PWM0计数器寄存器
__IO NU_REG_BITs CNR4;//PWM4计数器寄存器
};
union{
__IO NU_REG_BITs CMR0;//PWM0比较寄存器
__IO NU_REG_BITs CMR4;//PWM4比较寄存器
};
union{
__IO NU_REG_BITs PDR0;//PWM0数据寄存器
__IO NU_REG_BITs PDR4;//PWM4数据寄存器
};
union{
__IO NU_REG_BITs CNR1;//PWM1计数器寄存器
__IO NU_REG_BITs CNR5;//PWM5计数器寄存器
};
union{
__IO NU_REG_BITs CMR1;//PWM1比较寄存器
__IO NU_REG_BITs CMR5;//PWM5比较寄存器
};
union{
__IO NU_REG_BITs PDR1;//PWM1数据寄存器
__IO NU_REG_BITs PDR5;//PWM5数据寄存器
};
union{
__IO NU_REG_BITs CNR2;//PWM2计数器寄存器
__IO NU_REG_BITs CNR6;//PWM6计数器寄存器
};
union{
__IO NU_REG_BITs CMR2;//PWM2比较寄存器
__IO NU_REG_BITs CMR6;//PWM6比较寄存器
};
union{
__IO NU_REG_BITs PDR2;//PWM2数据寄存器
__IO NU_REG_BITs PDR6;//PWM6数据寄存器
};
union{
__IO NU_REG_BITs CNR3;//PWM3计数器寄存器
__IO NU_REG_BITs CNR7;//PWM7计数器寄存器
};
union{
__IO NU_REG_BITs CMR3;//PWM3比较寄存器
__IO NU_REG_BITs CMR7;//PWM7比较寄存器
};
union{
__IO NU_REG_BITs PDR3;//PWM3数据寄存器
__IO NU_REG_BITs PDR7;//PWM7数据寄存器
};
__IO NU_PWM_PBCR_T PBCR;
union{
__IO NU_PWM_PIER_T PIER;//PWM0~3或PWM4~7中断使能寄存器
__IO NU_PWM_PIER_T PIER03;//PWM0~3中断使能寄存器
__IO NU_PWM_PIER47_T PIER47;//PWM4~7中断使能寄存器
};
union{
__IO NU_PWM_PIIR_T PIIR;//PWM0~3或PWM4~7中断标志寄存器
__IO NU_PWM_PIIR_T PIIR03;//PWM0~3中断标志寄存器
__IO NU_PWM_PIIR47_T PIIR47;//PWM4~7中断标志寄存器
__IO NU_PWM_PIIR_T PIFR;//PWM0~3或PWM4~7中断标志寄存器
__IO NU_PWM_PIIR_T PIFR03;//PWM0~3中断标志寄存器
__IO NU_PWM_PIIR47_T PIFR47;//PWM4~7中断标志寄存器
};
__I NU_REG RESERVE1[2];
union{
__IO NU_PWM_CCR0_T CCR0;//捕捉控制寄存器01
__IO NU_PWM_CCR4_T CCR4;//捕捉控制寄存器45
__IO NU_PWM_CCR0_T CCR1;//捕捉控制寄存器01
__IO NU_PWM_CCR4_T CCR5;//捕捉控制寄存器45
__IO NU_PWM_CCR0_T CCR01;//捕捉控制寄存器01
__IO NU_PWM_CCR4_T CCR45;//捕捉控制寄存器45
};
union{
__IO NU_PWM_CCR2_T CCR2;//捕捉控制寄存器23
__IO NU_PWM_CCR6_T CCR6;//捕捉控制寄存器67
__IO NU_PWM_CCR2_T CCR3;//捕捉控制寄存器23
__IO NU_PWM_CCR6_T CCR7;//捕捉控制寄存器67
__IO NU_PWM_CCR2_T CCR23;//捕捉控制寄存器23
__IO NU_PWM_CCR6_T CCR67;//捕捉控制寄存器67
};
union{
__IO NU_REG_BITs CRLR0;//捕捉上升沿锁存寄存器0
__IO NU_REG_BITs CRLR4;//捕捉上升沿锁存寄存器4
};
union{
__IO NU_REG_BITs CFLR0;//捕捉下降沿锁存寄存器0
__IO NU_REG_BITs CFLR4;//捕捉下降沿锁存寄存器4
};
union{
__IO NU_REG_BITs CRLR1;//捕捉上升沿锁存寄存器1
__IO NU_REG_BITs CRLR5;//捕捉上升沿锁存寄存器5
};
union{
__IO NU_REG_BITs CFLR1;//捕捉下降沿锁存寄存器1
__IO NU_REG_BITs CFLR5;//捕捉下降沿锁存寄存器5
};
union{
__IO NU_REG_BITs CRLR2;//捕捉上升沿锁存寄存器2
__IO NU_REG_BITs CRLR6;//捕捉上升沿锁存寄存器6
};
union{
__IO NU_REG_BITs CFLR2;//捕捉下降沿锁存寄存器2
__IO NU_REG_BITs CFLR6;//捕捉下降沿锁存寄存器6
};
union{
__IO NU_REG_BITs CRLR3;//捕捉上升沿锁存寄存器3
__IO NU_REG_BITs CRLR7;//捕捉上升沿锁存寄存器7
};
union{
__IO NU_REG_BITs CFLR3;//捕捉下降沿锁存寄存器3
__IO NU_REG_BITs CFLR7;//捕捉下降沿锁存寄存器7
};
union{
__IO NU_REG_BITs CAPENR;//捕捉输入使能寄存器
__IO NU_PWM_CAPENR03_T CAPENR03;//捕捉输入03使能寄存器
__IO NU_PWM_CAPENR47_T CAPENR47;//捕捉输入47使能寄存器
};
union{
__IO NU_PWM_POE_T POE;//PWM输出使能寄存器
__IO NU_PWM_POE_T POE03;//PWM输出03使能寄存器
__IO NU_PWM_POE47_T POE47;//PWM输出47使能寄存器
};
}NU_PWM_T;
//----------------------------------------------------//
#define PWM03s (*((NU_PWM_T *) PWMA_BASE))//定位全局结构变量PWM03s
#define PWM47s (*((NU_PWM_T *) PWMB_BASE))//定位全局结构变量PWM47s
//----------------------------------------------------//
#define PWM0s (*((NU_PWM_T *) PWMA_BASE))//定位全局结构变量PWM0s
#define PWM1s (*((NU_PWM_T *) PWMA_BASE))//定位全局结构变量PWM1s
#define PWM2s (*((NU_PWM_T *) PWMA_BASE))//定位全局结构变量PWM2s
#define PWM3s (*((NU_PWM_T *) PWMA_BASE))//定位全局结构变量PWM3s
#define PWM4s (*((NU_PWM_T *) PWMB_BASE))//定位全局结构变量PWM4s
#define PWM5s (*((NU_PWM_T *) PWMB_BASE))//定位全局结构变量PWM5s
#define PWM6s (*((NU_PWM_T *) PWMB_BASE))//定位全局结构变量PWM6s
#define PWM7s (*((NU_PWM_T *) PWMB_BASE))//定位全局结构变量PWM7s
//----------------------------------------------------//
#define PWMx(x) ((NU_PWM_T *) PWMA_BASE + ((x >> 4) * 0x100000))
//----------------------------------------------------//
typedef enum
{
UART_IER_RDA_IEN = 0,//可接收数据中断使能
UART_IER_THRE_IEN = 1,//发送保持寄存器空中断使能
UART_IER_RLS_IEN = 2,//线上接收中断状态使能
UART_IER_MODEM_IEN = 3,//Modem中断状态使能
UART_IER_RTO_IEN = 4,//Rx Time out 中断使能
UART_IER_BUF_ERR_IEN = 5,//Buffer Error 中断使能
UART_IER_WAKE_IEN = 6,//唤醒CPU功能使能
UART_IER_LIN_RX_BRK_IEN = 8,//LIN RX Break Field Detected 中断使能
UART_IER_TIME_OUT_EN = 11,//Time-Out 计数器使能
UART_IER_AUTO_RTS_EN = 12,//RTS自动流控制使
UART_IER_AUTO_CTS_EN = 13,//CTS自动流控制使能
UART_IER_DMA_TX_EN = 14,//Tx DMA使能
UART_IER_DMA_RX_EN = 15//Rx DMA使能
}NU_UART_IER_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_IER_T Bits;
}NU_UART_IER_T;
//----------------------------------------------------//
typedef enum
{
UART_FCR_RFR = 1,//Rx软件复位
UART_FCR_TFR = 2,//Tx软件复位
UART_FCR_RFITL = 4,//Rx FIFO中断(INT_RDA)触发级别
UART_FCR_RX_DIS = 8,//RTS触发自动流程控制使能
UART_FCR_RTS_TRI_LEVEL = 16,//RTS触发自动流程控制
}NU_UART_FCR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_FCR_T Bits;
}NU_UART_FCR_T;
//----------------------------------------------------//
typedef enum
{
UART_LCR_WLS = 0,//字长度选择
UART_LCR_NSB = 2,//停止位数目
UART_LCR_PBE = 3,//奇偶使能位
UART_LCR_EPE = 4,//Even 奇偶使能
UART_LCR_SPE = 5,//Stick 奇偶使能
UART_LCR_BCB = 6 //钳制控制位
}NU_UART_LCR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_LCR_T Bits;
}NU_UART_LCR_T;
//----------------------------------------------------//
typedef enum
{
UART_MCR_RTS = 1,//RTS (Request-To-Send) 信号
UART_MCR_LBME = 9,//
UART_MCR_LEV_RTS = 13,//RTS 触发级别
UART_MCR_RTS_ST = 0,//RTS Pin 状态
}NU_UART_MCR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_MCR_T Bits;
}NU_UART_MCR_T;
//----------------------------------------------------//
typedef enum
{
UART_MSR_DCTSF = 0,//侦测 CTS 状态改变标志位
UART_MSR_CTS_ST = 4,//CTS Pin 状况
UART_MSR_LEV_CTS = 8//CTS 触发级别
}NU_UART_MSR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_MSR_T Bits;
}NU_UART_MSR_T;
//----------------------------------------------------//
typedef enum
{
UART_FSR_RX_OVER_IF = 0,//Rx overflow Error IF (只读)
UART_FSR_RS485_ADD_DETF = 3,//
UART_FSR_PEF = 4,//Parity Error 标志位
UART_FSR_FEF = 5,//Framing Error 标志位
UART_FSR_BIF = 6,//钳制中断标志位
UART_FSR_RX_POINTER = 8,//Rx FIFO pointer (只读)
UART_FSR_RX_EMPTY = 14,//接收FIFO 为空(只读)
UART_FSR_RX_FULL = 15,//接收 FIFO Full (只读)
UART_FSR_TX_POINTER = 16,//TX FIFO Pointer (只读)
UART_FSR_TX_EMPTY = 22,//发送FIFO 为空(只读)
UART_FSR_TX_FULL = 23,//全部 FIFO 传输 (只读)
UART_FSR_TX_OVER_IF = 24,//Tx 溢出 Error 中断标志位 (只读)
UART_FSR_TE_FLAG = 28//传输清空标志位 (只读)
}NU_UART_FSR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_FSR_T Bits;
}NU_UART_FSR_T;
//----------------------------------------------------//
typedef enum
{
UART_ISR_RDA_IF = 0,//Receive Data Available中断标志位 (只读)
UART_ISR_THRE_IF = 1,//Transmit Holding 寄存器 清空中断标志位(只读)
UART_ISR_RLS_IF = 2,//Receive Line中断标志位 (只读)
UART_ISR_MODEM_IF = 3,//MODEM 中断标志位 (只读)
UART_ISR_TOUT_IF = 4,//Time Out 中断标志位 (只读)
UART_ISR_BUF_ERR_IF = 5,//Buffer Error 中断标志位 (只读)
UART_ISR_LIN_RX_BREAK_IF = 7,//LIN Bus Rx Break Field 侦测标志位
UART_ISR_RDA_INT = 8,//接收数据可用中断状态指示中断控制器(INT_RDA)
UART_ISR_THRE_INT = 9,//发送保持寄存器 清空中断状态指示中断控制器(INT_THRE)
UART_ISR_RLS_INT = 10,//线上数据接收中断状态指示中断控制器(INT_RLS)
UART_ISR_MODEM_INT = 11,//MODEM 中断状态指示中断控制器(INT_MOS)
UART_ISR_TOUT_INT = 12,//Time Out 中断状态指示中断控制器(INT_Tout)
UART_ISR_BUF_ERR_INT = 13,//Buffer Error 中断状态指示中断控制器(INT_Buf_err)
UART_ISR_LIN_Rx_Break_INT = 15,//LIN Bus Rx Break Field 中断状态指示中断控制器
UART_ISR_HW_RLS_IF = 18,//DMA 模式, 接收 Line 状态标志位 (只读)
UART_ISR_HW_MODEM_IF = 19,//DMA 模式, MODEM Interrupt Flag (只读)
UART_ISR_HW_TOUT_IF = 20,//DMA 模式, Time out Interrupt Flag (只读)
UART_ISR_HW_BUF_ERR_IF = 21,//DMA 模式, Buffer Error Interrupt Flag (只读)
UART_ISR_HW_LIN_RX_BREAK_IF = 23,//DMA模式, LIN Bus Rx Break Field Detect 中断标志位
UART_ISR_HW_RLS_INT = 26,//DMA 模式, 接收 Line 中断状态指示中断控制器(INT_RLS)
UART_ISR_HW_MODEM_INT = 27,//DMA模式, MODEM 状态指示中断控制器 (INT_MOS)
UART_ISR_HW_TOUT_INT = 28,//DMA 模式, Time Out 状态指示中断控制器 (INT_Tout)
UART_ISR_HW_BUF_ERR_INT = 29,//DMA 模式, Buffer Error 侦测指示中断控制器 (INT_Buf_err)
UART_ISR_HW_LIN_RX_BREAK_INT = 31//DMA 模式, LIN Bus Rx Break Field 侦测指示中断控制器
}NU_UART_ISR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_ISR_T Bits;
}NU_UART_ISR_T;
//----------------------------------------------------//
typedef enum
{
UART_TOR_TOIC = 0,//时间溢出中断比较器
UART_TOR_DLY = 8,//
}NU_UART_TOR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_TOR_T Bits;
}NU_UART_TOR_T;
//----------------------------------------------------//
typedef enum
{
UART_BAUD_BRD = 0,//波特率分频16位
UART_BAUD_DIVIDER_X = 24,//分频 X
UART_BAUD_DIV_X_ONE = 28,//Divider X equal 1
UART_BAUD_DIV_X_EN = 29,//分频 X 使能
}NU_UART_BAUD_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_BAUD_T Bits;
}NU_UART_BAUD_T;
//----------------------------------------------------//
typedef enum
{
UART_IRCR_TX_SELECT = 1,//Tx_SELECT(1: 使能IrDA 发送,0: 使能 IrDA 接收)
UART_IRCR_INV_TX = 5,//INV_Tx(1= Tx 输出信号反转,0=无反转)
UART_IRCR_INV_RX = 6,//INV_Rx(1= Rx 输入信号反转,0= 无反转)
}NU_UART_IRCR_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_IRCR_T Bits;
}NU_UART_IRCR_T;
//----------------------------------------------------//
typedef enum
{
UART_ALTCON_LIN_BKFL = 0,//UART LIN Break Field 长度
UART_ALTCON_LIN_RX_EN = 6,//LIN RX 使能
UART_ALTCON_LIN_TX_EN = 7,//LIN TX 钳制模式使能
UART_ALTCON_RS485_NMM = 8,//
UART_ALTCON_RS485_AAD = 9,//
UART_ALTCON_RS485_AUD = 10,//
UART_ALTCON_RS485_ADD_EN = 15,//
UART_ALTCON_ADDR_MATCH = 24,//
}NU_UART_ALTCON_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_ALTCON_T Bits;
}NU_UART_ALTCON_T;
//----------------------------------------------------//
typedef enum
{
UART_FUNSEL_FUN_SEL = 0,//位1(IrDA_EN---IrDA 功能使能) 位0(LIN_EN---LIN 功能使能)
}NU_UART_FUNSEL_ENUM;
typedef volatile union
{
NU_REG Regs;
UART_FUNSEL_T Bits;//很臭的一个位域
}NU_UART_FUNSEL_T;
//----------------------------------------------------//
typedef struct
{
union{
__IO NU_REG_BITs DATA;//接收发送数据
__I NU_REG_BITs RBR;//接收数据缓存寄存器
__O NU_REG_BITs THR;//发送保持寄存器
};
__IO NU_UART_IER_T IER;//中断使能寄存器
__IO NU_UART_FCR_T FCR;//FIFO控制寄存器
__IO NU_UART_LCR_T LCR;//Line控制寄存器
__IO NU_UART_MCR_T MCR;//Modem控制寄存器
__IO NU_UART_MSR_T MSR;//Modem状态寄存器
__IO NU_UART_FSR_T FSR;//FIFO状态寄存器
__IO NU_UART_ISR_T ISR;//中断状态寄存器
__IO NU_UART_TOR_T TOR;//定时溢出寄存器
__IO NU_UART_BAUD_T BAUD;//波特率分频寄存器
__IO NU_UART_IRCR_T IRCR;//IrDA控制寄存器
__IO NU_UART_ALTCON_T ALTCON;//LIN Break失败计数寄存器
__IO NU_UART_FUNSEL_T FUNSEL;//功能选择寄存器
}NU_UART_T;
//----------------------------------------------------//
#define UART0s (*((NU_UART_T *) UART0_BASE))//定位全局结构变量UART0s
#define UART1s (*((NU_UART_T *) UART1_BASE))//定位全局结构变量UART0s
#define UART2s (*((NU_UART_T *) UART2_BASE))//定位全局结构变量UART0s
#define UART3s (*((NU_UART_T *) UART3_BASE))//定位全局结构变量UART0s
//----------------------------------------------------//
#define UARTx(x) ((NU_UART_T *) UART0_BASE + ((x & 1) * 0x100000) + ((x >> 1) * 0x104000))
#define Ux(x) ((NU_UART_T *) UART0_BASE + ((x & 1) * 0x100000) + ((x >> 1) * 0x104000))
//----------------------------------------------------//
typedef enum
{
ADC_ADDR_RSLT = 0,//A/D转换结果
ADC_ADDR_OVERRUN = 16,//结束运行标志位
ADC_ADDR_VALID = 17//有效标志位
}NU_ADC_ADDR_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADDR_T Bits;
}NU_ADC_ADDR_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADCR_ADEN = 0,//A/D转换使能
ADC_ADCR_ADIE = 1,//A/D中断使能
ADC_ADCR_ADMD = 2,//A/D转换操作模式
ADC_ADCR_TRGS = 4,//硬件触发源
ADC_ADCR_TRGCOND = 6,//外部触发条件
ADC_ADCR_TRGEN = 8,//外部触发使能
ADC_ADCR_PTEN = 9,//PDMA 传送使能
ADC_ADCR_DIFFEN = 10,//A/D差分输入模式使能
ADC_ADCR_ADST = 11,//A/D转换开始
ADC_ADCR_DMOF = 31
}NU_ADC_ADCR_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADCR_T Bits;
}NU_ADC_ADCR_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADCHER_CHEN0 = 0,//模拟输入通道0
ADC_ADCHER_CHEN1 = 1,//模拟输入通道1
ADC_ADCHER_CHEN2 = 2,//模拟输入通道2
ADC_ADCHER_CHEN3 = 3,//模拟输入通道3
ADC_ADCHER_CHEN4 = 4,//模拟输入通道4
ADC_ADCHER_CHEN5 = 5,//模拟输入通道5
ADC_ADCHER_CHEN6 = 6,//模拟输入通道6
ADC_ADCHER_CHEN7 = 7,//模拟输入通道7
ADC_ADCHER_PRESEL = 8 //模拟输入通道7选择位
//00:模拟输入通道7 01:Bandgap(VBG)模拟输入
//10:VTEMP模拟输入 11:模拟地
}NU_ADC_ADCHER_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADCHER_T Bits;
}NU_ADC_ADCHER_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADCMPR_CMPEN = 0, //比较使能
ADC_ADCMPR_CMPIE = 1, //比较中断使能
ADC_ADCMPR_CMPCOND = 2, //比较条件
ADC_ADCMPR_CMPCH = 3, //Compare通道选择(000=选择通道0转换结果,111=选择通道7转换结果)
ADC_ADCMPR_CMPMATCNT = 8, //比较匹配值
ADC_ADCMPR_CMPD = 16 //比较数值
}NU_ADC_ADCMPR_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADCMPR_T Bits;
}NU_ADC_ADCMPR_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADSR_ADF = 0,//A/D转换结束标志位
ADC_ADSR_CMPF0 = 1,//比较标志位
ADC_ADSR_CMPF1 = 2,//较标志位
ADC_ADSR_BUSY = 3,//BUSY/IDLE
ADC_ADSR_CHANNEL = 4,//当前转换通道
ADC_ADSR_VALID = 8,//数据有效标志位
ADC_ADSR_OVERRUN = 16//结束运行标志位
}NU_ADC_ADSR_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADSR_T Bits;
}NU_ADC_ADSR_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADCALR_CALEN = 0,//自身校准功能使能
ADC_ADCALR_CALDONE = 1 //校准完成标志(只读)
}NU_ADC_ADCALR_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADCALR_T Bits;
}NU_ADC_ADCALR_T;
//----------------------------------------------------//
typedef enum
{
ADC_ADPDMA_AD_PDMA = 0 //ADC PDMA当前数据传输寄存器
}NU_ADC_ADPDMA_ENUM;
typedef volatile union
{
NU_REG Regs;
ADC_ADPDMA_T Bits;
}NU_ADC_ADPDMA_T;
//----------------------------------------------------//
typedef struct
{
union{
__I NU_ADC_ADDR_T ADDR[8];//A/D数据寄存器0~7
struct{
__I NU_ADC_ADDR_T ADDR0;//A/D数据寄存器0
__I NU_ADC_ADDR_T ADDR1;//A/D数据寄存器1
__I NU_ADC_ADDR_T ADDR2;//A/D数据寄存器2
__I NU_ADC_ADDR_T ADDR3;//A/D数据寄存器3
__I NU_ADC_ADDR_T ADDR4;//A/D数据寄存器4
__I NU_ADC_ADDR_T ADDR5;//A/D数据寄存器5
__I NU_ADC_ADDR_T ADDR6;//A/D数据寄存器6
__I NU_ADC_ADDR_T ADDR7;//A/D数据寄存器7
};
};
__IO NU_ADC_ADCR_T ADCR;//ADC控制寄存器
__IO NU_ADC_ADCHER_T ADCHER;//A/D 通道使能
union{
__IO NU_ADC_ADCMPR_T ADCMPR[2];//A/D比较寄存器0,1
struct{
__IO NU_ADC_ADCMPR_T ADCMPR0;//A/D比较寄存器0
__IO NU_ADC_ADCMPR_T ADCMPR1;//A/D比较寄存器1
};
};
__IO NU_ADC_ADSR_T ADSR;//ADC状态寄存器
__IO NU_ADC_ADCALR_T ADCALR;//A/D校准寄存器
__I NU_REG RESERVE0;
__I NU_REG RESERVE1;
__IO NU_ADC_ADPDMA_T ADPDMA;//A/D PDMA当前数据传输寄存器
}NU_ADC_T;
//----------------------------------------------------//
#define ADCs (*((NU_ADC_T *) ADC_BASE))//定位全局结构变量ADCs
//----------------------------------------------------//
#define ADCx ((NU_ADC_T *) ADC_BASE)
//----------------------------------------------------//
typedef enum
{
SYSCLK_PWRCON_XTL12M_EN = 0,//外部12MHz晶振控制
SYSCLK_PWRCON_XTL32K_EN = 1,//外部32.768KHz晶振控制
SYSCLK_PWRCON_OSC22M_EN = 2,//内部22MHz振荡器控制
SYSCLK_PWRCON_OSC10K_EN = 3,//内部10KHz振荡器控制
SYSCLK_PWRCON_PD_WU_DLY = 4,//使能唤醒延时计数器
SYSCLK_PWRCON_PD_WU_INT_EN = 5,//掉电模式唤醒的中断使能
SYSCLK_PWRCON_PD_WU_STS = 6,//芯片掉电唤醒状态标志
SYSCLK_PWRCON_PWR_DOWN = 7,//激活或使能系统掉电模式
SYSCLK_PWRCON_PD_WAIT_CPU = 8 //控制进入掉电模式的条件
}NU_SYSCLK_PWRCON_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_PWRCON_T Bits;
}NU_SYSCLK_PWRCON_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_AHBCLK_PDMA_EN = 1,//PDMA控制器时钟使能控制
SYSCLK_AHBCLK_ISP_EN = 2,//Flash ISP控制器时钟使能控制
SYSCLK_AHBCLK_EBI_EN = 3 //
}NU_SYSCLK_AHBCLK_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_AHBCLK_T Bits;
}NU_SYSCLK_AHBCLK_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_APBCLK_WDT_EN = 0,//Watch Dog时钟使能
SYSCLK_APBCLK_RTC_EN = 1,//Real-Time-Clock APB接口时钟控制
SYSCLK_APBCLK_TMR0_EN = 2,//Timer0时钟使能控制
SYSCLK_APBCLK_TMR1_EN = 3,//Timer1时钟使能控制
SYSCLK_APBCLK_TMR2_EN = 4,//Timer2时钟使能控制
SYSCLK_APBCLK_TMR3_EN = 5,//Timer3时钟使能控制
SYSCLK_APBCLK_FDIV_EN = 6,//分频器输出时钟使能控制
SYSCLK_APBCLK_I2C0_EN = 8,//I2C0时钟使能控制
SYSCLK_APBCLK_I2C1_EN = 9,//I2C1时钟使能控制
SYSCLK_APBCLK_SPI0_EN = 12,//SPI0时钟使能控制
SYSCLK_APBCLK_SPI1_EN = 13,//SPI1时钟使能控制
SYSCLK_APBCLK_SPI2_EN = 14,//SPI2时钟使能控制
SYSCLK_APBCLK_SPI3_EN = 15,//SPI3时钟使能控制
SYSCLK_APBCLK_UART0_EN = 16,//UART0时钟使能控制
SYSCLK_APBCLK_UART1_EN = 17,//UART1时钟使能控制
SYSCLK_APBCLK_UART2_EN = 18,//UART2时钟使能控制
SYSCLK_APBCLK_PWM01_EN = 20,//PWM_01时钟使能控制
SYSCLK_APBCLK_PWM23_EN = 21,//PWM_23时钟使能控制
SYSCLK_APBCLK_PWM45_EN = 22,//PWM_45时钟使能控制
SYSCLK_APBCLK_PWM67_EN = 23,//PWM_67时钟使能控制
SYSCLK_APBCLK_CAN0_EN = 24,//使能CAN线控制器0时钟控制
SYSCLK_APBCLK_USBD_EN = 27,//USB FS设备控制器时钟使能控制
SYSCLK_APBCLK_ADC_EN = 28,//使能ADC时钟控制
SYSCLK_APBCLK_I2S_EN = 29,//I2S时钟使能控制
SYSCLK_APBCLK_ACMP_EN = 30,//模拟比较器时钟使能控制
SYSCLK_APBCLK_PS2_EN = 31//PS2时钟使能控制
}NU_SYSCLK_APBCLK_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_APBCLK_T Bits;
}NU_SYSCLK_APBCLK_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_CLKSTATUS_XTL12M_STB = 0,
SYSCLK_CLKSTATUS_XTL32K_STB = 1,
SYSCLK_CLKSTATUS_PLL_STB = 2,
SYSCLK_CLKSTATUS_OSC10K_STB = 3,
SYSCLK_CLKSTATUS_OSC22M_STB = 4,
SYSCLK_CLKSTATUS_RESERVE0 = 5,
SYSCLK_CLKSTATUS_CLK_SW_FAIL = 7
}NU_SYSCLK_CLKSTATUS_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_CLKSTATUS_T Bits;
}NU_SYSCLK_CLKSTATUS_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_CLKSEL0_HCLK_S = 0,
SYSCLK_CLKSEL0_STCLK_S = 3
}NU_SYSCLK_CLKSEL0_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_CLKSEL0_T Bits;
}NU_SYSCLK_CLKSEL0_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_CLKSEL1_WDT_S = 0,//WDGCLK时钟源选择
SYSCLK_CLKSEL1_ADC_S = 1,//ADC时钟源选择
SYSCLK_CLKSEL1_TMR0_S = 8,//TIMER0时钟源选择
SYSCLK_CLKSEL1_TMR1_S = 12,//TIMER1时钟源选择
SYSCLK_CLKSEL1_TMR2_S = 16,//TIMER2时钟源选择
SYSCLK_CLKSEL1_TMR3_S = 20,//TIMER3时钟源选择
SYSCLK_CLKSEL1_UART_S = 24,//UART时钟源选择
SYSCLK_CLKSEL1_CAN_S = 26,//CAN时钟源选择
SYSCLK_CLKSEL1_PWM01_S = 28,//PWM1与PWM0的时钟源选择
SYSCLK_CLKSEL1_PWM23_S = 30 //PWM3与PWM2的时钟源选择.
}NU_SYSCLK_CLKSEL1_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_CLKSEL1_T Bits;
}NU_SYSCLK_CLKSEL1_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_CLKDIV_HCLK_N = 0,//HCLK时钟频率=(HCLK时钟源频率)/(HCLK_N+1)
SYSCLK_CLKDIV_USB_N = 4,//USB时钟频率=(PLL频率)/(USB_N+1)
SYSCLK_CLKDIV_UART_N = 8,//UART时钟频率=(UART时钟源频率)/(UART_N+1)
SYSCLK_CLKDIV_CAN_N = 12,//APU时钟频率=(CAN时钟源频率)/(CAN_N+1)
SYSCLK_CLKDIV_ADC_N = 16,//ADC时钟频率=ADC时钟源频率/(ADC_N+1)
SYSCLK_CLKDIV_CAN_N_EXT = 24//
}NU_SYSCLK_CLKDIV_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_CLKDIV_T Bits;
}NU_SYSCLK_CLKDIV_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_CLKSEL2_I2S_S = 0,//I2S时钟源选择
SYSCLK_CLKSEL2_FRQDIV_S = 2,//时钟分频器时钟源选择
SYSCLK_CLKSEL2_PWM45_S = 4,//PWM4与PWM5的时钟源选择
SYSCLK_CLKSEL2_PWM67_S = 6 //PWM6与PWM7的时钟源选择
}NU_SYSCLK_CLKSEL2_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_CLKSEL2_T Bits;
}NU_SYSCLK_CLKSEL2_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_PLLCON_FB_DV = 0,//PLL反馈分频控制引脚
SYSCLK_PLLCON_IN_DV = 9,//PLL输入分频控制引脚
SYSCLK_PLLCON_OUT_DV = 14,//PLL输出分频控制引脚
SYSCLK_PLLCON_PD = 16,//掉电模式
SYSCLK_PLLCON_BP = 17,//PLL旁路控制
SYSCLK_PLLCON_OE = 18,//PLL OE(FOUT enable)引脚控制
SYSCLK_PLLCON_PLL_SRC = 19 //PLL时钟源选择
}NU_SYSCLK_PLLCON_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_PLLCON_T Bits;
}NU_SYSCLK_PLLCON_T;
//----------------------------------------------------//
typedef enum
{
SYSCLK_FRQDIV_FSEL = 0,//分频器输出频率选择位
SYSCLK_FRQDIV_FDIV_EN = 4 //频率分频器使能位
}NU_SYSCLK_FRQDIV_ENUM;
typedef volatile union
{
NU_REG Regs;
SYSCLK_FRQDIV_T Bits;
}NU_SYSCLK_FRQDIV_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_SYSCLK_PWRCON_T PWRCON;//系统掉电控制寄存器
__IO NU_SYSCLK_AHBCLK_T AHBCLK;//AHB设备时钟使能控制寄存器
__IO NU_SYSCLK_APBCLK_T APBCLK;//APB设备时钟使能控制寄存器
__IO NU_SYSCLK_CLKSTATUS_T CLKSTATUS;
__IO NU_SYSCLK_CLKSEL0_T CLKSEL0;//时钟源选择控制寄存器0
__IO NU_SYSCLK_CLKSEL1_T CLKSEL1;//时钟源选择控制寄存器1
__IO NU_SYSCLK_CLKDIV_T CLKDIV;//时钟分频寄存器
__IO NU_SYSCLK_CLKSEL2_T CLKSEL2;//时钟源选择控制寄存器2
__IO NU_SYSCLK_PLLCON_T PLLCON;//PLL 控制寄存器
__IO NU_SYSCLK_FRQDIV_T FRQDIV;//频率分频器控制寄存器
}NU_SYSCLK_T;
//----------------------------------------------------//
#define SYSCLKs (*((NU_SYSCLK_T *) SYSCLK_BASE))//定位全局结构变量SYSCLKs
//----------------------------------------------------//
#define SYSCLKx ((NU_SYSCLK_T *) SYSCLK_BASE)
//----------------------------------------------------//
typedef enum
{
GCR_RSTSRC_RSTS_POR = 0,//RSTS_POR标志位由POR模块的”复位信号”置1
GCR_RSTSRC_RSTS_RESET = 1,//RSTS_PAD标志位由/RESET脚的”复位信号”置1
GCR_RSTSRC_RSTS_WDT = 2,//RSTS_WDG标志位由看门狗模块的”复位信号”置1
GCR_RSTSRC_RSTS_LVR = 3,//RSTS_LVR标志位由低压复位模块的”复位信号”置1
GCR_RSTSRC_RSTS_BOD = 4,//RSTS_BOD标志位由欠压检测模块的”复位信号”置1
GCR_RSTSRC_RSTS_MCU = 5,//RSTS_SYS由来自MCU Cortex_M0的“复位信号“置位
GCR_RSTSRC_RSTS_CPU = 7 //RSTS_CPU标志由硬件置位
}NU_GCR_RSTSRC_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_RSTSRC_T Bits;
}NU_GCR_RSTSRC_T;
//----------------------------------------------------//
typedef enum
{
GCR_IPRSTC1_CHIP_RST = 0,//CHIP复位
GCR_IPRSTC1_CPU_RST = 1,//CPU内核复位
GCR_IPRSTC1_PDMA_RST = 2,//PDMA控制器复位
GCR_IPRSTC1_EBI_RST = 3 //EBI接口复位
}NU_GCR_IPRSTC1_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_IPRSTC1_T Bits;
}NU_GCR_IPRSTC1_T;
//----------------------------------------------------//
typedef enum
{
GCR_IPRSTC2_GPIO_RST = 1,//GPIO控制器复位
GCR_IPRSTC2_TMR0_RST = 2,//Timer0控制器复位
GCR_IPRSTC2_TMR1_RST = 3,//Timer1控制器复位
GCR_IPRSTC2_TMR2_RST = 4,//Timer2控制器复位
GCR_IPRSTC2_TMR3_RST = 5,//Timer3控制器复位
GCR_IPRSTC2_I2C0_RST = 8,//I2C0控制器复位
GCR_IPRSTC2_I2C1_RST = 9,//I2C1控制器复位
GCR_IPRSTC2_SPI0_RST = 12,//SPI0控制器复位
GCR_IPRSTC2_SPI1_RST = 13,//SPI1控制器复位
GCR_IPRSTC2_SPI2_RST = 14,//SPI2控制器复位
GCR_IPRSTC2_SPI3_RST = 15,//SPI3控制器复位
GCR_IPRSTC2_UART0_RST = 16,//UART0控制器复位
GCR_IPRSTC2_UART1_RST = 17,//UART1控制器复位
GCR_IPRSTC2_UART2_RST = 18,//UART2控制器复位
GCR_IPRSTC2_PWM03_RST = 20,//PWM03控制器复位
GCR_IPRSTC2_PWM47_RST = 21,//PWM47控制器复位
GCR_IPRSTC2_ACMP_RST = 22,//模拟比较器控制器复位
GCR_IPRSTC2_PS2_RST = 23,//PS2控制器复位
GCR_IPRSTC2_CAN0_RST = 24,//CAN0控制器复位
GCR_IPRSTC2_USBD_RST = 27,//USB设备控制器复位
GCR_IPRSTC2_ADC_RST = 28,//ADC控制器复位
GCR_IPRSTC2_I2S_RST = 29,//I2S控制器复位
}NU_GCR_IPRSTC2_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_IPRSTC2_T Bits;
}NU_GCR_IPRSTC2_T;
//----------------------------------------------------//
typedef enum
{
GCR_CPR_HPE = 0 //CHIP复位
}NU_GCR_CPR_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_CPR_T Bits;
}NU_GCR_CPR_T;
//----------------------------------------------------//
typedef enum
{
GCR_BODCR_BOD_EN = 0,//欠压检测使能
GCR_BODCR_BOD_VL = 1,//欠压检测Threshold电压选择
GCR_BODCR_BOD_RSTEN = 3,//欠压复位使能
GCR_BODCR_BOD_INTF = 4,//欠压检测中断标志
GCR_BODCR_BOD_LPM = 5,//低压模式下的欠压检测
GCR_BODCR_BOD_OUT = 6,//欠压检测输出的状态位
GCR_BODCR_LVR_EN = 7//低压复位使能
}NU_GCR_BODCR_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_BODCR_T Bits;
}NU_GCR_BODCR_T;
//----------------------------------------------------//
typedef enum
{
GCR_TEMPCR_VTEMP_EN = 0,//温度传感器使能
}NU_GCR_TEMPCR_ENUM;
typedef struct
{
__IO uint32_t VTEMP_EN:1;//温度传感器使能
__I uint32_t RESERVE1:31;
}GCR_TEMPCR_Bits;
typedef volatile union
{
NU_REG Regs;
GCR_TEMPCR_Bits Bits;
}NU_GCR_TEMPCR_T;
//----------------------------------------------------//
typedef enum
{
GCR_GPAMFP_ADC0 = 0, //PA.0 Pin功能选择ADC0
GCR_GPAMFP_ADC1_AD12 = 1, //PA.1 Pin功能选择ADC1
GCR_GPAMFP_ADC2_AD11 = 2, //PA.2 Pin功能选择ADC2
GCR_GPAMFP_ADC3_AD10 = 3, //PA.3 Pin功能选择ADC3
GCR_GPAMFP_ADC4_AD9 = 4, //PA.4 Pin功能选择ADC4
GCR_GPAMFP_ADC5_AD8 = 5, //PA.5 Pin功能选择ADC5
GCR_GPAMFP_ADC6_AD7 = 6, //PA.6 Pin功能选择ADC6
GCR_GPAMFP_ADC7_SS21_AD6 = 7,//PA.7 Pin功能选择ADC7
GCR_GPAMFP_I2C0_SDA = 8, //PA.8 Pin功能选择I2C0_SDA
GCR_GPAMFP_I2C0_SCL = 9, //PA.9 Pin功能选择I2C0_SCL
GCR_GPAMFP_I2C1_SDA_nWR = 10,//PA.10 Pin功能选择I2C1_SDA
GCR_GPAMFP_I2C1_SCL_nRD = 11,//PA.11 Pin功能选择I2C1_SCL
GCR_GPAMFP_PWM0_AD13 = 12, //PA.12 Pin功能选择PWM0
GCR_GPAMFP_PWM1_AD14 = 13, //PA.13 Pin功能选择PWM1
GCR_GPAMFP_PWM2_AD15 = 14, //PA.14 Pin功能选择PWM2
GCR_GPAMFP_PWM3_I2SMCLK = 15,//PA.15 Pin功能选择PWM3
GCR_GPAMFP_SCHMITT = 16, //PA[15:0]I/O史密特触发输入使能
}NU_GCR_GPAMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_GPAMFP_T Bits;
}NU_GCR_GPAMFP_T;
//----------------------------------------------------//
typedef enum
{
GCR_GPBMFP_UART0_RX = 0,//PB.0 Pin功能选择
GCR_GPBMFP_UART0_TX = 1,//PB.1 Pin功能选择
GCR_GPBMFP_UART0_nRTS_nWRL = 2,//PB.2 Pin功能选择
GCR_GPBMFP_UART0_nCTS_nWRH = 3,//PB.3 Pin功能选择
GCR_GPBMFP_UART1_RX = 4,//PB.4 Pin功能选择
GCR_GPBMFP_UART1_TX = 5,//PB.5 Pin功能选择
GCR_GPBMFP_UART1_nRTS_ALE = 6,//PB.6 Pin功能选择
GCR_GPBMFP_UART1_nCTS_nCS = 7,//PB.7 Pin功能选择
GCR_GPBMFP_TM0 = 8,//PB.8 Pin功能选择
GCR_GPBMFP_TM1_SS11 = 9,//PB.9 Pin功能选择
GCR_GPBMFP_TM2_SS01 = 10,//PB.10 Pin功能选择
GCR_GPBMFP_TM3_PWM4 = 11,//PB.11 Pin功能选择
GCR_GPBMFP_CPO0_CLKO_AD0 = 12,//PB.12 Pin功能选择
GCR_GPBMFP_CPO1_AD1 = 13,//PB.13 Pin功能选择
GCR_GPBMFP_INT1_SS31 = 14,//PB.14 Pin功能选择
GCR_GPBMFP_INT0 = 15,//PB.15 Pin功能选择
GCR_GPBMFP_SCHMITT = 16//PB[15:0]I/O史密特触发输入使能
}NU_GCR_GPBMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_GPBMFP_T Bits;
}NU_GCR_GPBMFP_T;
//----------------------------------------------------//
typedef enum
{
GCR_GPCMFP_SPI0_SS0_I2SLRCLK = 0,//PC.0 Pin功能选择
GCR_GPCMFP_SPI0_CLK_I2SBCLK = 1,//PC.0 Pin功能选择
GCR_GPCMFP_SPI0_MISO0_I2SDI = 2,//PC.0 Pin功能选择
GCR_GPCMFP_SPI0_MOSI0_I2SDO = 3,//PC.0 Pin功能选择
GCR_GPCMFP_SPI0_MISO1 = 4,//PC.0 Pin功能选择
GCR_GPCMFP_SPI0_MOSI1 = 5,//PC.0 Pin功能选择
GCR_GPCMFP_CPP0_AD4 = 6,//PC.0 Pin功能选择
GCR_GPCMFP_CPN0_AD5 = 7,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_SS0_MCLK = 8,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_CLK = 9,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_MISO0 = 10,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_MOSI0 = 11,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_MISO1 = 12,//PC.0 Pin功能选择
GCR_GPCMFP_SPI1_MOSI1 = 13,//PC.0 Pin功能选择
GCR_GPCMFP_CPP1_AD2 = 14,//PC.0 Pin功能选择
GCR_GPCMFP_CPN1_AD3 = 15,//PC.0 Pin功能选择
GCR_GPCMFP_SCHMITT = 16,//PC[15:0]I/O史密特触发输入使能
}NU_GCR_GPCMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_GPCMFP_T Bits;
}NU_GCR_GPCMFP_T;
//----------------------------------------------------//
typedef enum
{
GCR_GPDMFP_SPI2_SS0 = 0,//PD.0 Pin功能选择
GCR_GPDMFP_SPI2_CLK_SPI0_SS1 = 1,//PD.1 Pin功能选择
GCR_GPDMFP_SPI2_MISO0_SPI0_MISO1 = 2,//PD.2 Pin功能选择
GCR_GPDMFP_SPI2_MOSI0_SPI0_MOSI1 = 3,//PD.3 Pin功能选择
GCR_GPDMFP_SPI2_MISO1 = 4,//PD.4 Pin功能选择
GCR_GPDMFP_SPI2_MOSI1 = 5,//PD.5 Pin功能选择
GCR_GPDMFP_CAN0_RX = 6,//PD.6 Pin功能选择
GCR_GPDMFP_CAN0_TX = 7,//PD.7 Pin功能选择
GCR_GPDMFP_SPI3_SS0 = 8,//PD.8 Pin功能选择
GCR_GPDMFP_SPI3_CLK = 9,//PD.9 Pin功能选择
GCR_GPDMFP_SPI3_MISO0 = 10,//PD.10 Pin功能选择
GCR_GPDMFP_SPI3_MOSI0 = 11,//PD.11 Pin功能选择
GCR_GPDMFP_SPI3_MISO1 = 12,//PD.12 Pin功能选择
GCR_GPDMFP_SPI3_MOSI1 = 13,//PD.13 Pin功能选择
GCR_GPDMFP_UART2_RX = 14,//PD.14 Pin功能选择
GCR_GPDMFP_UART2_TX = 15,//PD.15 Pin功能选择
GCR_GPDMFP_SCHMITT = 16,//PD[15:0]I/O史密特触发输入使能
}NU_GCR_GPDMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_GPDMFP_T Bits;
}NU_GCR_GPDMFP_T;
//----------------------------------------------------//
typedef enum
{
GCR_GPEMFP_PWM6 = 0,//PE.0 Pin功能选择
GCR_GPEMFP_PWM7 = 1,//PE.1 Pin功能选择
GCR_GPEMFP_PWM5 = 5,//PE.6 Pin功能选择
GCR_GPEMFP_SCHMITT = 16 //PE[15:0]I/O史密特触发输入使能
}NU_GCR_GPEMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_GPEMFP_T Bits;
}NU_GCR_GPEMFP_T;
//----------------------------------------------------//
typedef enum
{
GCR_ALTMFP_PB10_S01 = 0,//PB10_S01与GPB_MFP[10]决定GPB.10的功能
GCR_ALTMFP_PB9_S11 = 1,//PB9_S11与GPB_MFP[9]决定PB.9的功能
GCR_ALTMFP_PA7_S21 = 2,//PA7_S21与GPA_MFP[7]决定PA.7的功能
GCR_ALTMFP_PB14_S31 = 3,//PB14_S31与GPB_MFP[14]决定PB.14的功能
GCR_ALTMFP_PB11_PWM4 = 4,//PB11_PWM4与GPB_MFP[11]决定PB.11的功能
GCR_ALTMFP_PC0_I2SLRCLK = 5,//PC0_I2SLRCLK与GPC_MFP[0]决定PC.0的功能
GCR_ALTMFP_PC1_I2SBCLK = 6,//PC1_I2SBCLK与GPC_MFP[1 决定PC.1的功能
GCR_ALTMFP_PC2_I2SDI = 7,//PC2_I2SDI与GPC_MFP[2]决定PC.2的功能
GCR_ALTMFP_PC3_I2SDO = 8,//PC2_I2SDO与GPC_MFP[3]决定PC.3的功能
GCR_ALTMFP_PA15_I2SMCLK = 9,//PA15_I2SMCLK与GPA_MFP[15]决定PA.15的功能
GCR_ALTMFP_PB12_CLKO = 10,//PB12_CLKO与GPB_MFP[12]决定PB.12的功能
GCR_ALTMFP_EBI_EN = 11,
GCR_ALTMFP_EBI_MCLK_EN = 12, /* GPC8 */
GCR_ALTMFP_EBI_WRL_EN =13, /* GPB2 */
GCR_ALTMFP_EBI_WRH_EN = 14, /* GPB3 */
GCR_ALTMFP_EBI_HB_EN = 15
}NU_GCR_ALTMFP_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_ALTMFP_T Bits;
}NU_GCR_ALTMFP_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_REG_BITs PDID;
__IO NU_GCR_RSTSRC_T RSTSRC;//系统管理器控制寄存器
__IO NU_GCR_IPRSTC1_T IPRSTC1;//IP复位控制寄存器1
__IO NU_GCR_IPRSTC2_T IPRSTC2;//IP复位控制寄存器2
__IO NU_GCR_CPR_T CPR;
__I NU_REG RESERVE0;
__IO NU_GCR_BODCR_T BODCR;//欠压检测控制寄存器
__IO NU_GCR_TEMPCR_T TEMPCR;//温度传感器控制寄存器
__I NU_REG RESERVE1;
__IO NU_REG_BITs PORCR;//上电复位控制寄存器
__I NU_REG RESERVE2[2];
__IO NU_GCR_GPAMFP_T GPAMFP;//多功能GPIOA控制寄存器
__IO NU_GCR_GPBMFP_T GPBMFP;//多功能GPIOB控制寄存器
__IO NU_GCR_GPCMFP_T GPCMFP;//多功能GPIOC控制寄存器
__IO NU_GCR_GPDMFP_T GPDMFP;//多功能GPIOD控制寄存器
__IO NU_GCR_GPEMFP_T GPEMFP;//多功能GPIOE控制寄存器
__I NU_REG RESERVE3[3];
__IO NU_GCR_ALTMFP_T ALTMFP;//可选多功能引脚控制寄存器
__I NU_REG RESERVE4[43];
__IO NU_REG_BITs REGLOCK;//寄存器锁定键地址寄存器
__I NU_REG RESERVE5[3];
__IO NU_REG_BITs RCADJ;//RC 校验控制寄存器
}NU_GCR_T;
//----------------------------------------------------//
#define SYSs (*((NU_GCR_T *) GCR_BASE))//定位全局结构变量SYSs
//----------------------------------------------------//
#define SYSx ((NU_GCR_T *) GCR_BASE)
//----------------------------------------------------//
typedef enum
{
GCR_INTSRC_INTSRC = 0//
}NU_GCR_INTSRC_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_INTSRC_T Bits;
}NU_GCR_INTSRC_T;
//----------------------------------------------------//
typedef enum
{
GCR_NMISEL_NMISEL = 0,//Cortex-M0的NMI 中断源可以从interrupt[31:0]中选择一个
GCR_NMISEL_INT_TEST = 7//
}NU_GCR_NMISEL_ENUM;
typedef volatile union
{
NU_REG Regs;
GCR_NMISEL_T Bits;
}NU_GCR_NMISEL_T;
//----------------------------------------------------//
typedef struct
{
__I NU_GCR_INTSRC_T INTSRC[32];//MCU IRQ0~31 (BOD) 中断源识别
__IO NU_GCR_NMISEL_T NMISEL;//NMI 中断源选择控制寄存器
__IO NU_REG_BITs MCUIRQ;//MCU IRQ 号识别寄存器
}NU_GCR_INT_T;
//----------------------------------------------------//
#define SYSINTs (*((NU_GCR_INT_T *) INT_BASE))//定位全局结构变量GCR_INTs
//----------------------------------------------------//
#define SYSINTx ((NU_GCR_INT_T *) INT_BASE)
//----------------------------------------------------//
typedef enum
{
WDT_WTCR_WTR = 0,//看门狗定时器重置
WDT_WTCR_WTRE = 1,//看门狗定时器复位使能
WDT_WTCR_WTRF = 2,//看门狗定时器复位标志
WDT_WTCR_WTIF = 3,//看门狗定时器中断标志
WDT_WTCR_WTWKE = 4,//看门狗定时器唤醒功能使能位
WDT_WTCR_WTWKF = 5,//看门狗定时器唤醒标志
WDT_WTCR_WTIE = 6,//看门狗定时器中断使能
WDT_WTCR_WTE = 7,//看门狗定时器使能
WDT_WTCR_WTIS = 8,//看门狗定时器间隔选择
//000:69.33us 001:72.53us 010:85.33us 011:170.67us
//100:426.67us 101:1.45ms 110:5.55ms 111:21.93ms
}NU_WDT_WTCR_ENUM;
typedef volatile union
{
NU_REG Regs;
WDT_WTCR_T Bits;
}NU_WDT_WTCR_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_WDT_WTCR_T WTCR;//看门狗定时器控制寄存器
}NU_WDT_T;
//----------------------------------------------------//
#define WDTs (*((NU_WDT_T *) WDT_BASE))//定位全局结构变量WDTs
//----------------------------------------------------//
#define WDTx ((NU_WDT_T *) WDT_BASE)
//----------------------------------------------------//
typedef enum
{
RTC_AER_AER = 0,//RTC寄存器写入使能密码(只写)
RTC_AER_ENF = 16//RTC 寄存器写入使能标志(只读)
}NU_RTC_AER_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_AER_T Bits;
}NU_RTC_AER_T;
typedef enum
{
RTC_FCR_INTEGER_32761 = 0,
RTC_FCR_INTEGER_32762 = 1,
RTC_FCR_INTEGER_32763 = 2,
RTC_FCR_INTEGER_32764 = 3,
RTC_FCR_INTEGER_32765 = 4,
RTC_FCR_INTEGER_32766 = 5,
RTC_FCR_INTEGER_32767 = 6,
RTC_FCR_INTEGER_32768 = 7,
RTC_FCR_INTEGER_32769 = 8,
RTC_FCR_INTEGER_32770 = 9,
RTC_FCR_INTEGER_32771 = 10,
RTC_FCR_INTEGER_32772 = 11,
RTC_FCR_INTEGER_32773 = 12,
RTC_FCR_INTEGER_32774 = 13,
RTC_FCR_INTEGER_32775 = 14,
RTC_FCR_INTEGER_32776 = 15
}NU_RTC_FCR_INTEGER_ENUM;
//----------------------------------------------------//
typedef enum
{
RTC_FCR_FRACTION = 0,//分数部分(公式=(分数部分值)x60)
RTC_FCR_INTEGER = 8 //整数部分
}NU_RTC_FCR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_FCR_T Bits;
}NU_RTC_FCR_T;
//----------------------------------------------------//
typedef enum
{
RTC_TLR_SEC1 = 0,//秒个位
RTC_TLR_SEC10 = 4,//秒十位
RTC_TLR_MIN1 = 8,//分个位
RTC_TLR_MIN10 = 12,//分十位
RTC_TLR_HR1 = 16,//小时个位
RTC_TLR_HR10 = 20//小时十位
}NU_RTC_TLR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_TLR_T Bits;
}NU_RTC_TLR_T;
//----------------------------------------------------//
typedef enum
{
RTC_CLR_DAY1 = 0,//日位
RTC_CLR_DAY10 = 4,//日十位
RTC_CLR_MON1 = 8,//月个位
RTC_CLR_MON10 = 12,//月十位
RTC_CLR_YEAR1 = 16,//年个位
RTC_CLR_YEAR10 = 20//年十位
}NU_RTC_CLR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_CLR_T Bits;
}NU_RTC_CLR_T;
//----------------------------------------------------//
typedef enum
{
RTC_TSSR_HR24 = 0//(1)24-小时/(0)12-小时模式选择(带AM /PM 指示)
}NU_RTC_TSSR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_TSSR_T Bits;
}NU_RTC_TSSR_T;
//----------------------------------------------------//
typedef enum
{
RTC_DWR_DWR = 0//一周日期寄存器(0:星期天 1:星期一 6:星期六)
}NU_RTC_DWR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_DWR_T Bits;
}NU_RTC_DWR_T;
typedef enum
{
RTC_TAR_SEC1 = 0,//秒个位
RTC_TAR_SEC10 = 4,//秒十位
RTC_TAR_MIN1 = 8,//分个位
RTC_TAR_MIN10 = 12,//分十位
RTC_TAR_HR1 = 16,//小时个位
RTC_TAR_HR10 = 20//小时十位
}NU_RTC_TAR_ENUM;
//----------------------------------------------------//
typedef volatile union
{
NU_REG Regs;
RTC_TLR_T Bits;
}NU_RTC_TAR_T;
typedef enum
{
RTC_CAR_DAY1 = 0,//日位
RTC_CAR_DAY10 = 4,//日十位
RTC_CAR_MON1 = 8,//月个位
RTC_CAR_MON10 = 12,//月十位
RTC_CAR_YEAR1 = 16,//年个位
RTC_CAR_YEAR10 = 20//年十位
}NU_RTC_CAR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_CLR_T Bits;
}NU_RTC_CAR_T;
//----------------------------------------------------//
typedef enum
{
RTC_LIR_LIR = 0//按年分割指示寄存器(只读)
}NU_RTC_LIR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_LIR_T Bits;
}NU_RTC_LIR_T;
typedef enum
{
RTC_RIER_AIER = 0,//闹钟中断使能
RTC_RIER_TIER = 1 //时钟节拍中断使能
}NU_RTC_RIER_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_RIER_T Bits;
}NU_RTC_RIER_T;
//----------------------------------------------------//
typedef enum
{
RTC_RIIR_AI = 0,//RTC闹钟中断标志
RTC_RIIR_TI = 1 //RTC时钟节拍中断标志
}NU_RTC_RIIR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_RIIR_T Bits;
}NU_RTC_RIIR_T;
//----------------------------------------------------//
typedef enum
{
RTC_TTR_TWKE_1 = 0,//时钟节拍1
RTC_TTR_TWKE_1_2 = 1,//时钟节拍1/2
RTC_TTR_TWKE_1_4 = 2,//时钟节拍1/4
RTC_TTR_TWKE_1_8 = 3,//时钟节拍1/8
RTC_TTR_TWKE_1_16 = 4,//时钟节拍1/16
RTC_TTR_TWKE_1_32 = 5,//时钟节拍1/32
RTC_TTR_TWKE_1_64 = 6,//时钟节拍1/64
RTC_TTR_TWKE_1_128 = 7,//时钟节拍1/128
}NU_RTC_TTR_TWKE_ENUM;
typedef enum
{
RTC_TTR_TTR = 0,//时钟节拍寄存器
RTC_TTR_TWKE = 3 //RTC定时器唤醒CPU使能位
}NU_RTC_TTR_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_TTR_T Bits;
}NU_RTC_TTR_T;
//----------------------------------------------------//
typedef enum
{
RTC_PWRCON_PTOUT = 0,//
RTC_PWRCON_PWROFF = 16//
}NU_RTC_PWRCON_ENUM;
typedef volatile union
{
NU_REG Regs;
RTC_PWRCON_T Bits;
}NU_RTC_PWRCON_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_REG_BITs INIR;//RTC复位寄存器
__IO NU_RTC_AER_T AER;//RTC读写使能寄存器
__IO NU_RTC_FCR_T FCR;//RTC频率补偿寄存器
__IO NU_RTC_TLR_T TLR;//时间载入寄存器
__IO NU_RTC_CLR_T CLR;//日历载入寄存器
__IO NU_RTC_TSSR_T TSSR;//时间格式选择寄存器
__IO NU_RTC_DWR_T DWR;//一周日期寄存器
__IO NU_RTC_TAR_T TAR;//时间闹钟寄存器
__IO NU_RTC_CAR_T CAR;//日历闹钟寄存器
__IO NU_RTC_LIR_T LIR;//年分割指示寄存器
__IO NU_RTC_RIER_T RIER;//RTC中断使能寄存器
__IO NU_RTC_RIIR_T RIIR;//RTC中断指示寄存器
__IO NU_RTC_TTR_T TTR;//RTC时钟节拍寄存器
__IO NU_RTC_PWRCON_T PWRCON;
}NU_RTC_T;
//----------------------------------------------------//
#define RTCs (*((NU_RTC_T *) RTC_BASE))//定位全局结构变量RTCs
//----------------------------------------------------//
#define RTCx ((NU_RTC_T *) RTC_BASE)
//----------------------------------------------------//
typedef enum
{
FMC_ISPCON_PT_40uS,FMC_ISPCON_PT_45uS,FMC_ISPCON_PT_50uS,FMC_ISPCON_PT_55uS,
FMC_ISPCON_PT_20uS,FMC_ISPCON_PT_25uS,FMC_ISPCON_PT_30uS,FMC_ISPCON_PT_35uS
}NU_FMC_ISPCON_PT_ENUM;
typedef enum
{
FMC_ISPCON_ET_20uS,FMC_ISPCON_ET_25uS,FMC_ISPCON_ET_30uS,FMC_ISPCON_ET_35uS,
FMC_ISPCON_ET_3uS,FMC_ISPCON_ET_5uS,FMC_ISPCON_ET_10uS,FMC_ISPCON_ET_15uS
}NU_FMC_ISPCON_ET_ENUM;
typedef enum
{
FMC_ISPCON_ISPEN = 0,//ISP使能
FMC_ISPCON_BS = 1,//启动选择(1=由LDROM启动,0=由APROM启动)
FMC_ISPCON_CFGUEN = 4,//使能由ISP更新配置位(1 = 使能ISP更新配置位,0 = 禁止ISP更新配置位)
FMC_ISPCON_LDUEN = 5,//LDROM更新使能(1 = MCU在APROM中运行时，LDROM 被更新)
FMC_ISPCON_ISPFF = 6,//ISP失败标志(写1清标志)
FMC_ISPCON_SWRST = 7,//软件复位(写1执行软件复位,复位完成后由硬件清零)
FMC_ISPCON_PT = 8,//Flash编程时间(000:40uS,45uS,50uS,55uS,20uS,25uS,30uS,35uS)
FMC_ISPCON_ET = 12 //Flash擦除时间(000:20uS,25uS,30uS,35uS,3uS,5uS,10uS,15uS)
}NU_FMC_ISPCON_ENUM;
typedef volatile union
{
NU_REG Regs;
FMC_ISPCON_T Bits;
}NU_FMC_ISPCON_T;
//----------------------------------------------------//
typedef enum
{
FMC_ISPCMD_Standby = 0x30,//待机
FMC_ISPCMD_Read = 0x00,//读
FMC_ISPCMD_Program = 0x21,//编程
FMC_ISPCMD_PageErase = 0x22,//页擦除
FMC_ISPCMD_ReadCID = 0x0b,//读CID
FMC_ISPCMD_ReadDID = 0x0c,//读DID
}NU_FMC_ISPCMD_TABLE_ENUM;
typedef enum
{
FMC_ISPCMD_FCTRL = 0,//
FMC_ISPCMD_FCEN = 4,//
FMC_ISPCMD_FOEN = 5//
}NU_FMC_ISPCMD_ENUM;
typedef volatile union
{
NU_REG Regs;
FMC_ISPCMD_T Bits;
}NU_FMC_ISPCMD_T;
//----------------------------------------------------//
typedef enum
{
FMC_ISPTRG_ISPGO = 0//ISP开始触发(写1开始ISP操作，当ISP操作结束后，该位由硬件自动清零)
}NU_FMC_ISPTRG_ENUM;
typedef volatile union
{
NU_REG Regs;
FMC_ISPTRG_T Bits;
}NU_FMC_ISPTRG_T;
//----------------------------------------------------//
typedef enum
{
FMC_FATCON_FATS_40nS = 0,//
FMC_FATCON_FATS_50nS = 1,//
FMC_FATCON_FATS_60nS = 2,//
FMC_FATCON_FATS_70nS = 3,//
FMC_FATCON_FATS_80nS = 4,//
FMC_FATCON_FATS_90nS = 5,//
FMC_FATCON_FATS_100nS = 6,//
FMC_FATCON_FATS_RESERVE = 7//
}NU_FMC_FATCON_FATS_ENUM;
typedef enum
{
FMC_FATCON_FPSEN = 0,//Flash 省电使能(1 = 使能FLASH省电功能)
FMC_FATCON_FATS = 1,//FLASH访问时间窗口选择
FMC_FATCON_L_SPEED = 4//
}NU_FMC_FATCON_ENUM;
typedef volatile union
{
NU_REG Regs;
FMC_FATCON_T Bits;
}NU_FMC_FATCON_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_FMC_ISPCON_T ISPCON;//ISP控制寄存器
__IO NU_REG_BITs ISPADR;//ISP地址寄存器
__IO NU_REG_BITs ISPDAT;//ISP数据寄存器
__IO NU_FMC_ISPCMD_T ISPCMD;//ISP命令寄存器
__IO NU_FMC_ISPTRG_T ISPTRG;//ISP触发控制寄存器
__IO NU_REG_BITs DFBADR;//数据FLASH基地址(该寄存器为数据FLASH开始地址寄存器,只读)
__IO FMC_FATCON_T FATCON;//Flash访问时间控制寄存器
}NU_FMC_T;
//----------------------------------------------------//
#define FMCs (*((NU_FMC_T *) FMC_BASE))//定位全局结构变量FMCs
//----------------------------------------------------//
#define FMCx ((NU_FMC_T *) FMC_BASE)
//----------------------------------------------------//
typedef enum
{
PS2_CON_PS2EN = 0,//使能 PS2 设备
PS2_CON_TXINTEN = 1,//使能传输中断
PS2_CON_RXINTEN = 2,//使能接收中断
PS2_CON_TXFIFO_DEPTH = 3,//FIFO 传输数据长度
PS2_CON_ACK = 7,//应答使能
PS2_CON_CLRFIFO = 8,//清 TX FIFO
PS2_CON_OVERRIDE = 9,//软件无视PS2 CLK/DATA Pin 状态
PS2_CON_FPS2CLK = 10,//Force PS2CLK Line
PS2_CON_FPS2DAT = 11,//Force PS2DATA Line
}NU_PS2_CON_ENUM;
typedef volatile union
{
NU_REG Regs;
PS2_CON_T Bits;
}NU_PS2_CON_T;
//----------------------------------------------------//
typedef enum
{
PS2_STATUS_BYTEIDX_TXDATA0_0_7 = 0,//TXDATA0[7:0]
PS2_STATUS_BYTEIDX_TXDATA0_8_15 = 1,//TXDATA0[15:8]
PS2_STATUS_BYTEIDX_TXDATA0_16_23 = 2,//TXDATA0[23:16]
PS2_STATUS_BYTEIDX_TXDATA0_24_31 = 3,//TXDATA0[31:24]
PS2_STATUS_BYTEIDX_TXDATA1_0_7 = 4,//TXDATA1[7:0]
PS2_STATUS_BYTEIDX_TXDATA1_8_15 = 5,//TXDATA1[15:8]
PS2_STATUS_BYTEIDX_TXDATA1_16_23 = 6,//TXDATA1[23:16]
PS2_STATUS_BYTEIDX_TXDATA1_24_31 = 7,//TXDATA1[31:24]
PS2_STATUS_BYTEIDX_TXDATA2_0_7 = 8,//TXDATA2[7:0]
PS2_STATUS_BYTEIDX_TXDATA2_8_15 = 9,//TXDATA2[15:8]
PS2_STATUS_BYTEIDX_TXDATA2_16_23 = 10,//TXDATA2[23:16]
PS2_STATUS_BYTEIDX_TXDATA2_24_31 = 11,//TXDATA2[31:24]
PS2_STATUS_BYTEIDX_TXDATA3_0_7 = 12,//TXDATA3[7:0]
PS2_STATUS_BYTEIDX_TXDATA3_8_15 = 13,//TXDATA3[15:8]
PS2_STATUS_BYTEIDX_TXDATA3_16_23 = 14,//TXDATA3[23:16]
PS2_STATUS_BYTEIDX_TXDATA3_24_31 = 15,//TXDATA3[31:24]
}NU_PS2_STATUS_BYTEIDX_ENUM;
typedef enum
{
PS2_STATUS_PS2CLK = 0,//CLK Pin 状态
PS2_STATUS_PS2DATA = 1,//DATA Pin状态
PS2_STATUS_FRAMERR = 2,//帧错误
PS2_STATUS_RXPARTY = 3,//接收奇偶
PS2_STATUS_RXBUSY = 4,//接收忙
PS2_STATUS_TXBUSY = 5,//发送忙
PS2_STATUS_RXOVF = 6,//RX Buffer 改写
PS2_STATUS_TXEMPTY = 7,//TX FIFO 空
PS2_STATUS_BYTEIDX = 8,//字节目录
}NU_PS2_STATUS_ENUM;
typedef volatile union
{
NU_REG Regs;
PS2_STATUS_T Bits;
}NU_PS2_STATUS_T;
//----------------------------------------------------//
typedef enum
{
PS2_INTID_RXINT = 0,//传输中断(当应答位发送，该位置位.如果 RXINTEN置 1，中断产生.写 1 清该位为 0)
PS2_INTID_TXINT = 1,//接收中断(当 STOP 位传输后，该位置 1. 如果 TXINTEN 位置 1，中断产生.写 1 清该位为 0)
}NU_PS2_INTID_ENUM;
typedef struct
{
__IO NU_REG TXINT:1;
__IO NU_REG RXINT:1;
__I NU_REG RESERVE:30;
}NU_PS2_INTID_Bits;
typedef volatile union
{
NU_REG Regs;
NU_PS2_INTID_Bits Bits;
}NU_PS2_INTID_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_PS2_CON_T PS2CON;//PS2控制寄存器
union{
__IO NU_REG_BITs TXDATA[4];//PS2发送数据寄存器数组0~3
struct{
__IO NU_REG_BITs TXDATA0;//PS2发送数据寄存器0
__IO NU_REG_BITs TXDATA1;//PS2发送数据寄存器1
__IO NU_REG_BITs TXDATA2;//PS2发送数据寄存器2
__IO NU_REG_BITs TXDATA3;//PS2发送数据寄存器3
};
};
__IO NU_REG_BITs RXDATA;//PS2接收数据寄存器
__IO NU_PS2_STATUS_T STATUS;//PS2状态寄存器
__IO NU_PS2_INTID_T INTID;//PS2中断识别寄存器
}NU_PS2_T;
//----------------------------------------------------//
#define PS2s (*((NU_PS2_T *) PS2_BASE))//定位全局结构变量PS2s
//----------------------------------------------------//
#define PS2x ((NU_PS2_T *) PS2_BASE)
//----------------------------------------------------//
typedef enum
{
CAN_OPMODE_RSTM = 0,//复位模式
CAN_OPMODE_LOM = 1//Listen Only Mode
}NU_CAN_OPMODE_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_OPMODE_T Bits;
}NU_CAN_OPMODE_T;
//----------------------------------------------------//
typedef enum
{
CAN_CMD_TXREQ = 0,//传输请求
CAN_CMD_ABRT = 1,//中断自动重传输功能
CAN_CMD_OVERFLOAD_EN = 5,//
CAN_CMD_WAKEUP_EN = 6,//唤醒使能
CAN_CMD_CAN_EN = 7,//CAN BUS 使能
}NU_CAN_CMD_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_CMD_T Bits;
}NU_CAN_CMD_T;
//----------------------------------------------------//
typedef enum
{
CAN_BUSSTS_TXCOMPLET = 3,//传输完成状态标志
CAN_BUSSTS_RXSTS = 4,//接收状态标志
CAN_BUSSTS_TXSTS = 5,//发送状态标志
CAN_BUSSTS_BUSIDLE = 6,//总线空闲状态标志
CAN_BUSSTS_BUSOFF = 7,//总线ON/OFF 状态
CAN_BUSSTS_EACTIVE = 8,//Error 主动状态
CAN_BUSSTS_EPASSIVE = 9,//Error 被动状态
}NU_CAN_BUSSTS_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_BUSSTS_T Bits;
}NU_CAN_BUSSTS_T;
//----------------------------------------------------//
typedef enum
{
CAN_INTR_RI = 0,//接收中断标志
CAN_INTR_TI = 1,//发送中断标志
CAN_INTR_WUI = 4,//Wake-Up 中断标志
CAN_INTR_ALI = 6,//Arbitration Lost 中断标志
CAN_INTR_BEI = 7//总线Error 中断标志
}NU_CAN_INTR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_INTR_T Bits;
}NU_CAN_INTR_T;
//----------------------------------------------------//
typedef enum
{
CAN_INTEN_RIE = 0,//接收中断使能
CAN_INTEN_TIE = 1,//发送中断使能
CAN_INTEN_WUIE = 4,//Wake-Up 中断使能
CAN_INTEN_ALIE = 6,//Arbitration Lost 中断使能
CAN_INTEN_BEIE = 7//总线Error 中断使能
}NU_CAN_INTEN_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_INTEN_T Bits;
}NU_CAN_INTEN_T;
//----------------------------------------------------//
typedef enum
{
CAN_BTIMR_BRP = 0,//
CAN_BTIMR_SJW = 4,//同步跳转宽度
CAN_BTIMR_TSEG1 = 6,//时间区域 1
CAN_BTIMR_TSEG2 = 11,//时间区域2
CAN_BTIMR_SAMP = 15,//取样点数量
}NU_CAN_BTIMR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_BTIMR_T Bits;
}NU_CAN_BTIMR_T;
//----------------------------------------------------//
typedef enum
{
CAN_ERRCR_BIT_ERR = 0,//Bit Error
CAN_ERRCR_ACK_ERR = 1,//应答错误
CAN_ERRCR_CRC_ERR = 2,//CRC 错误
CAN_ERRCR_FORM_ERR = 3,//Form 错误
CAN_ERRCR_STUFF_ERR = 4,//Stuff 错误
CAN_ERRCR_ID11_NM = 5,//ID11 无匹配状态
CAN_ERRCR_ID18_NM = 6,//ID18 无匹配状态
}NU_CAN_ERRCR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_ERRCR_T Bits;
}NU_CAN_ERRCR_T;
//----------------------------------------------------//
typedef enum
{
CAN_RECNTR_RECNT = 0//RX error 接收寄存器 反映当前接收到的 error 计数器
}NU_CAN_RECNTR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_RECNTR_T Bits;
}NU_CAN_RECNTR_T;
//----------------------------------------------------//
typedef enum
{
CAN_TECNTR_TECNT = 0//发送错误计数器寄存器 反映当前传输 error 计数器的值
}NU_CAN_TECNTR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_TECNTR_T Bits;
}NU_CAN_TECNTR_T;
//----------------------------------------------------//
typedef enum
{
CAN_TXFINFO_TXDLC = 0,//发送数据长度码
CAN_TXFINFO_TXRTR = 6,//远端传输请求(1 = 传输格式为 REMOTE FRAME (标准格式同扩展格式))
CAN_TXFINFO_TXFF = 7//发送祯格式(1 = 传输格式为扩展模式,0 =传输格式为标准模式)
}NU_CAN_TXFINFO_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_TXFINFO_T Bits;
}NU_CAN_TXFINFO_T;
//----------------------------------------------------//
typedef enum
{
CAN_TXIDR_TXID = 3//发送标示符(TXID[31:21] 为 11-bit 标志符 应用于标准格式,TX[31:3] is the29-bit 标志符 应用于扩展格式)
}NU_CAN_TXIDR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_TXIDR_T Bits;
}NU_CAN_TXIDR_T;
//----------------------------------------------------//
typedef enum
{
CAN_TXDATA_TXDATA1 = 0,//发送数据缓存1
CAN_TXDATA_TXDATA2 = 8,//发送数据缓存2
CAN_TXDATA_TXDATA3 = 16,//发送数据缓存3
CAN_TXDATA_TXDATA4 = 24,//发送数据缓存4
CAN_TXDATA_TXDATA5 = 0,//发送数据缓存5
CAN_TXDATA_TXDATA6 = 8,//发送数据缓存6
CAN_TXDATA_TXDATA7 = 16,//发送数据缓存7
CAN_TXDATA_TXDATA8 = 24,//发送数据缓存8
}NU_CAN_TXDATA_ENUM;
//----------------------------------------------------//
typedef enum
{
CAN_TXDATA_A_TXDATA1 = 0,//发送数据缓存1
CAN_TXDATA_A_TXDATA2 = 8,//发送数据缓存2
CAN_TXDATA_A_TXDATA3 = 16,//发送数据缓存3
CAN_TXDATA_A_TXDATA4 = 24,//发送数据缓存4
}NU_CAN_TXDATA_A_ENUM;
typedef struct
{
__IO NU_REG TXDATA1:8;
__IO NU_REG TXDATA2:8;
__IO NU_REG TXDATA3:8;
__IO NU_REG TXDATA4:8;
}NU_CAN_TXDATA_A_Bits;
typedef volatile union
{
NU_REG Regs;
NU_CAN_TXDATA_A_Bits Bits;
}NU_CAN_TXDATA_A_T;
//----------------------------------------------------//
typedef enum
{
CAN_TXDATA_B_TXDATA5 = 0,//发送数据缓存5
CAN_TXDATA_B_TXDATA6 = 8,//发送数据缓存6
CAN_TXDATA_B_TXDATA7 = 16,//发送数据缓存7
CAN_TXDATA_B_TXDATA8 = 24,//发送数据缓存8
}NU_CAN_TXDATA_B_ENUM;
typedef struct
{
__IO NU_REG TXDATA5:8;
__IO NU_REG TXDATA6:8;
__IO NU_REG TXDATA7:8;
__IO NU_REG TXDATA8:8;
}NU_CAN_TXDATA_B_Bits;
typedef volatile union
{
NU_REG Regs;
NU_CAN_TXDATA_B_Bits Bits;
}NU_CAN_TXDATA_B_T;
//----------------------------------------------------//
typedef enum
{
CAN_RXFINFO_RXDLC = 0,//接收数据长度码
CAN_RXFINFO_RXRTR = 6,//远端接收传输请求位
CAN_RXFINFO_RXIDE = 7,//接收标示扩展位
}NU_CAN_RXFINFO_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_RXFINFO_T Bits;
}NU_CAN_RXFINFO_T;
//----------------------------------------------------//
typedef enum
{
CAN_RXIDR_RXID = 3//接收标志(RXID[28:18] 为 11-bit 标志符 用于标准模式)
}NU_CAN_RXIDR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_RXIDR_T Bits;
}NU_CAN_RXIDR_T;
//----------------------------------------------------//
typedef enum
{
CAN_RXDATA_RXDATA1 = 0,//接收数据缓存1
CAN_RXDATA_RXDATA2 = 8,//接收数据缓存2
CAN_RXDATA_RXDATA3 = 16,//接收数据缓存3
CAN_RXDATA_RXDATA4 = 24,//接收数据缓存4
CAN_RXDATA_RXDATA5 = 0,//接收数据缓存5
CAN_RXDATA_RXDATA6 = 8,//接收数据缓存6
CAN_RXDATA_RXDATA7 = 16,//接收数据缓存7
CAN_RXDATA_RXDATA8 = 24,//接收数据缓存8
}NU_CAN_RXDATA_ENUM;
//----------------------------------------------------//
typedef enum
{
CAN_RXDATA_A_RXDATA1 = 0,//接收数据缓存1
CAN_RXDATA_A_RXDATA2 = 8,//接收数据缓存2
CAN_RXDATA_A_RXDATA3 = 16,//接收数据缓存3
CAN_RXDATA_A_RXDATA4 = 24,//接收数据缓存4
}NU_CAN_RXDATA_A_ENUM;
typedef struct
{
__IO NU_REG RXDATA1:8;
__IO NU_REG RXDATA2:8;
__IO NU_REG RXDATA3:8;
__IO NU_REG RXDATA4:8;
}NU_CAN_RXDATA_A_Bits;
typedef volatile union
{
NU_REG Regs;
NU_CAN_RXDATA_A_Bits Bits;
}NU_CAN_RXDATA_A_T;
//----------------------------------------------------//
typedef enum
{
CAN_RXDATA_B_RXDATA5 = 0,//接收数据缓存5
CAN_RXDATA_B_RXDATA6 = 8,//接收数据缓存6
CAN_RXDATA_B_RXDATA7 = 16,//接收数据缓存7
CAN_RXDATA_B_RXDATA8 = 24,//接收数据缓存8
}NU_CAN_RXDATA_B_ENUM;
typedef struct
{
__IO NU_REG RXDATA5:8;
__IO NU_REG RXDATA6:8;
__IO NU_REG RXDATA7:8;
__IO NU_REG RXDATA8:8;
}NU_CAN_RXDATA_B_Bits;
typedef volatile union
{
NU_REG Regs;
NU_CAN_RXDATA_B_Bits Bits;
}NU_CAN_RXDATA_B_T;
//----------------------------------------------------//
typedef enum
{
CAN_ACR_ACRID = 3//ACR[31:21] 应用于识别 11-bit 接收信息.ACR[20:3] 应用于识别 18-bit 接收信息
}NU_CAN_ACR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_ACR_T Bits;
}NU_CAN_ACR_T;
//----------------------------------------------------//
typedef enum
{
CAN_AMR_AMRID = 3//AMR[31:21] 应用于识别 11-bit 接收信息.AMR[20:3] 应用于识别 18-bit 接收信息
}NU_CAN_AMR_ENUM;
typedef volatile union
{
NU_REG Regs;
CAN_AMR_T Bits;
}NU_CAN_AMR_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_CAN_OPMODE_T OPMODE;//CAN总线操作模式寄存器
__IO NU_CAN_CMD_T CMD;//命令寄存器
__IO NU_CAN_BUSSTS_T BUSSTS;//总线状态寄存器
__IO NU_CAN_INTR_T INTR;//中断状态寄存器
__IO NU_CAN_INTEN_T INTEN;//中断使能寄存器
__IO NU_CAN_BTIMR_T BTIMR;//总线位时序寄存器
__I NU_REG PROTECT[2];//保留
__IO NU_CAN_ERRCR_T ERRCR;//错误捕捉寄存器
__I NU_REG PROTECT1;//保留
__IO NU_CAN_RECNTR_T RECNTR;//接收错误计数寄存器
__IO NU_CAN_TECNTR_T TECNTR;//发送错误计数寄存器
__IO NU_CAN_TXFINFO_T TXFINFO;//发送祯信息寄存器
__IO NU_CAN_TXIDR_T TXIDR;//发送标示符寄存器
union{
__IO NU_REG_BITs TXDATA[2];//发送数据AB寄存器数组
struct{
__IO NU_REG_BITs TXDATA_A;//发送数据A寄存器
__IO NU_REG_BITs TXDATA_B;//发送数据B寄存器
};
};
__IO NU_CAN_RXFINFO_T RXFINFO;//接收祯信息寄存器
__IO NU_CAN_RXIDR_T RXIDR;//接收标志寄存器
union{
__IO NU_REG_BITs RX_DATA[2];//接收数据AB寄存器数组(晕！！！多了_)
struct{
__IO NU_CAN_RXDATA_A_T RX_DATA_A;//接收数据A寄存器
__IO NU_CAN_RXDATA_B_T RX_DATA_B;//接收数据B寄存器
};
__IO NU_REG_BITs RXDATA[2];//接收数据AB寄存器数组
struct{
__IO NU_CAN_RXDATA_A_T RXDATA_A;//接收数据A寄存器
__IO NU_CAN_RXDATA_B_T RXDATA_B;//接收数据B寄存器
};
};
__IO NU_CAN_ACR_T ACR;//验收代码寄存器
__IO NU_CAN_AMR_T AMR;//验收屏蔽寄存器
}NU_CAN_T;
//----------------------------------------------------//
#define CANs (*((NU_CAN_T *) CAN_BASE))//定位全局结构变量CANs
//----------------------------------------------------//
#define CANx ((NU_CAN_T *) CAN_BASE)
//----------------------------------------------------//
typedef enum
{
USBD_INTEN_BUS = 0,//1/0使能/禁止BUS事件中断
USBD_INTEN_USB = 1,//1/0 使能/禁止USB事件中断
USBD_INTEN_FLD = 2,//1/0使能/禁止 浮动检测中断
USBD_INTEN_WAKEUP = 3,//1/0 使能/禁止 唤醒功能
USBD_INTEN_WAKEUP_EN = 8,//1/0 使能/禁止USB 唤醒功能
USBD_INTEN_INNAK_EN = 15,//1/0 在接到IN标志后，设备响应NAK，使能/禁止中断
}NU_USBD_INTEN_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_INTEN_T Bits;
}NU_USBD_INTEN_T;
//----------------------------------------------------//
typedef enum
{
USBD_INTSTS_BUS = 0,//Bus 事件发生，通过ATTR[3:0]可知是哪类Bus事件发生，向EVF[0]写1清标志
USBD_INTSTS_USB = 1,//USB 事件发生，通过STS[6:4]可知是哪类USB事件发生
USBD_INTSTS_FLD = 2,//浮动检测事件发生，向EVF［2］写1 清标志
USBD_INTSTS_WAKEUP = 3,//唤醒事件发生，向EVF［3］写1 清标志
USBD_INTSTS_EPTF = 16,//1 = USB事件发生，通过STS[xxxx]可知是哪类USB事件发生
USBD_INTSTS_SETUP = 31,//1 = Setup事件发生，向EVF[31]写1清标志
}NU_USBD_INTSTS_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_INTSTS_T Bits;
}NU_USBD_INTSTS_T;
//----------------------------------------------------//
typedef enum
{
USBD_FADDR_FADDR = 0//USB设备的功能地址
}NU_USBD_FADDR_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_FADDR_T Bits;
}NU_USBD_FADDR_T;
//----------------------------------------------------//
typedef enum
{
USBD_EPSTS_OVERRUN = 7,//输出数据超过最大有效载荷或安装数据超过8字节
USBD_EPSTS_EPSTS0 = 8,//端点0的系统状态(000=In ACK~111=同步传输结束)
USBD_EPSTS_EPSTS1 = 11,//端点1的系统状态(000=In ACK~111=同步传输结束)
USBD_EPSTS_EPSTS2 = 14,//端点2的系统状态(000=In ACK~111=同步传输结束)
USBD_EPSTS_EPSTS3 = 17,//端点3的系统状态(000=In ACK~111=同步传输结束)
USBD_EPSTS_EPSTS4 = 20,//端点4的系统状态(000=In ACK~111=同步传输结束)
USBD_EPSTS_EPSTS5 = 23,//端点5的系统状态(000=In ACK~111=同步传输结束)
}NU_USBD_EPSTS_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_EPSTS_T Bits;
}NU_USBD_EPSTS_T;
//----------------------------------------------------//
typedef enum
{
USBD_ATTR_USBRST = 0,//SE0(single-ended 0) 超过2.5uS，总线复位.
USBD_ATTR_SUSPEND = 1,//Bus空闲超过3mS,表示 要么电缆没连接，要么主机正在休眠.
USBD_ATTR_RESUME = 2,//从暂停中恢复
USBD_ATTR_TIMEOUT = 3,//无响应超过18位时间
USBD_ATTR_PHY_EN = 4,//使能 PHY
USBD_ATTR_RWAKEUP = 5,//使USB总线处于K状态，以便远程唤醒.
USBD_ATTR_USB_EN = 7,//使能 USB
USBD_ATTR_DPPU_EN = 8,//使能 DP上拉电阻
USBD_ATTR_PDB = 9,//掉电 PHY, 低电平有效
}NU_USBD_ATTR_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_ATTR_T Bits;
}NU_USBD_ATTR_T;
//----------------------------------------------------//
typedef enum
{
USBD_FLDET_FLDET = 0//1/0: 连接/悬空
}NU_USBD_FLDET_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_FLDET_T Bits;
}NU_USBD_FLDET_T;
//----------------------------------------------------//
typedef enum
{
USBD_BUFSEG_BUFSEG = 3//仅用于标记设置(总线缓冲有效的开始地址= {BUFSEG[8:3], 3’b000})
}NU_USBD_BUFSEG_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_BUFSEG_T Bits;
}NU_USBD_BUFSEG_T;
//----------------------------------------------------//
typedef enum
{
USBD_EP_BUFSEG_BUFSEG = 0//USB缓冲有效的开始地址
}NU_USBD_EP_BUFSEG_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_BUFSEG_T Bits;
}NU_USBD_EP_BUFSEG_T;
//----------------------------------------------------//
typedef enum
{
USBD_EP_MXPLD_MXPLD = 0//Read:(IN : 发送到主机的数据长度,OUT : 从主机接收到数据的实际长度.)
//Write:(IN : 发送到主机的数据长度,OUT : 从主机接收到数据的最大长度
//注：一旦MXPLD被写，数据包将在IN/OUT标志到达之后立即发送/接收.
}NU_USBD_EP_MXPLD_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_MXPLD_T Bits;
}NU_USBD_EP_MXPLD_T;
//----------------------------------------------------//
typedef enum
{
USBD_EP_CFG_EPT = 0,//端点号
USBD_EP_CFG_ISOCH = 4,//同步，无握手
USBD_EP_CFG_STATE = 5,//状态(00 = 禁止端点01 = Out 端点10 = IN 端点11 = 无定义)
USBD_EP_CFG_DSQ = 7,//主机应答之后，IN标记自动指定为数据0或1.
USBD_EP_CFG_STALL_CTL = 9,//1 = 在setup阶段允许自动清stall
}NU_USBD_EP_CFG_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_CFG_T Bits;
}NU_USBD_EP_CFG_T;
//----------------------------------------------------//
typedef enum
{
USBD_EP_CFGP_CFGP = 0,//IN: 写 ‘1’ 清in ready （由MXPLD置1）.OUT: 写 ‘1’清out ready（由MXPLD置1）
USBD_EP_CFGP_STALL = 1,//置1， 使设备响应STALL
}NU_USBD_EP_CFGP_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_CFGP_T Bits;
}NU_USBD_EP_CFGP_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_USBD_EP_BUFSEG_T BUFSEG;//端点0~5的缓冲分割寄存器
__IO NU_USBD_EP_MXPLD_T MXPLD;//端点0~5的最大有效载荷寄存器
__IO NU_USBD_EP_CFG_T CFG;//端点0~5的配置寄存器
__IO NU_USBD_EP_CFGP_T CFGP;//端点0~5的额外配置寄存器
}NU_USBD_EP_T;
//----------------------------------------------------//
typedef enum
{
USBD_DRVSE0_DRVSE0 = 0//1/0: 驱动 se0/无
}NU_USBD_DRVSE0_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_DRVSE0_T Bits;
}NU_USBD_DRVSE0_T;
//----------------------------------------------------//
typedef enum
{
USBD_PDMA_PDMA_RW = 0,//0 = 从内存读数据到USB缓存,1 = 从USB缓存读数据到内存
USBD_PDMA_PDMA_EN = 0//0 = 禁止PDMA,1 = 使能PDMA,该位在PDMA传输完毕后自动清零.
}NU_USBD_PDMA_ENUM;
typedef volatile union
{
NU_REG Regs;
USBD_PDMA_T Bits;
}NU_USBD_PDMA_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_USBD_INTEN_T INTEN;//中断使能寄存器
__IO NU_USBD_INTSTS_T INTSTS;//中断事件标志寄存器
__IO NU_USBD_FADDR_T FADDR;//功能地址寄存器
__IO NU_USBD_EPSTS_T EPSTS;//系统状态寄存器
__IO NU_USBD_ATTR_T ATTR;//总线状态&归属寄存器
__I NU_USBD_FLDET_T FLDET;//悬空检测寄存器
__IO NU_USBD_BUFSEG_T BUFSEG;//缓冲分割寄存器
__I NU_REG RESERVE0;
union{
__IO NU_USBD_EP_T EP[6];//端点数组0~5
struct{
__IO NU_USBD_EP_T EP0;//端点0
__IO NU_USBD_EP_T EP1;//端点1
__IO NU_USBD_EP_T EP2;//端点2
__IO NU_USBD_EP_T EP3;//端点3
__IO NU_USBD_EP_T EP4;//端点4
__IO NU_USBD_EP_T EP5;//端点5
};
};
__I NU_REG RESERVE1[4];
__IO NU_USBD_DRVSE0_T DRVSE0;//驱动SE0寄存器(1/0: 驱动 se0/无)
__I NU_REG RESERVE2[4];
__IO NU_USBD_PDMA_T PDMA;//PDMA 控制寄存器
}NU_USBD_T;
//----------------------------------------------------//
#define USBDs (*((NU_USBD_T *) USBD_BASE))//定位全局结构变量USBDs
//----------------------------------------------------//
#define USBDx ((NU_USBD_T *) USBD_BASE)
//----------------------------------------------------//
typedef enum
{
I2S_CON_WORDWIDTH_8Bit = 0,//
I2S_CON_WORDWIDTH_16Bit = 1,//
I2S_CON_WORDWIDTH_24Bit = 2,//
I2S_CON_WORDWIDTH_32Bit = 3,//
}NU_I2S_CON_WORDWIDTH_ENUM;
typedef enum
{
I2S_CON_I2SEN = 0,//使能I2S 控制器
I2S_CON_TXEN = 1,//发送使能
I2S_CON_RXEN = 2,//接收使能
I2S_CON_MUTE = 3,//使能发送静音
I2S_CON_WORDWIDTH = 4,//字宽度
I2S_CON_MONO = 6,//单声道数据
I2S_CON_FORMAT = 7,//数据模式
I2S_CON_SLAVE = 8,//从机模式
I2S_CON_TXTH = 9,//发送FIFO的阈值水平
I2S_CON_RXTH = 12,//接收FIFO的阈值水平
I2S_CON_MCLKEN = 15,//使能主时钟
I2S_CON_RCHZCEN = 16,//使能右声道过零检测
I2S_CON_LCHZCEN = 17,//使能左声道过零检测
I2S_CON_CLR_TXFIFO = 18,//清发送FIFO
I2S_CON_CLR_RXFIFO = 19,//清接收FIFO
I2S_CON_TXDMA = 20,//使能 DMA发送
I2S_CON_RXDMA = 21,//使能DMA接收
}NU_I2S_CON_ENUM;
typedef volatile union
{
NU_REG Regs;
I2S_CON_T Bits;
}NU_I2S_CON_T;
//----------------------------------------------------//
typedef enum
{
I2S_CLKDIV_MCLK_DIV = 0,//主时钟分频
I2S_CLKDIV_BCLK_DIV = 8,//位时钟分频
}NU_I2S_CLKDIV_ENUM;
typedef volatile union
{
NU_REG Regs;
I2S_CLKDIV_T Bits;
}NU_I2S_CLKDIV_T;
//----------------------------------------------------//
typedef enum
{
I2S_IE_RXUDFIE = 0,//接收FIFO下溢中断使能
I2S_IE_RXOVFIE = 1,//接收FIFO溢出中断使能
I2S_IE_RXTHIE = 2,//接收FIFO阈值水平中断
I2S_IE_TXUDFIE = 8,//发送FIFO下溢中断使能
I2S_IE_TXOVFIE = 9,//发送FIFO溢出中断使能
I2S_IE_TXTHIE = 10,//发送FIFO 阈值水平中断使能
I2S_IE_RZCIE = 11,//右声道过零检测中断使能
I2S_IE_LZCIE = 12,//左声道过零检测中断使能
}NU_I2S_IE_ENUM;
typedef volatile union
{
NU_REG Regs;
I2S_IE_T Bits;
}NU_I2S_IE_T;
//----------------------------------------------------//
typedef enum
{
I2S_STATUS_I2SINT = 0,//I2S 中断标志
I2S_STATUS_I2SRXINT = 1,//I2S 发送中断
I2S_STATUS_I2STXINT = 2,//I2S 接收中断
I2S_STATUS_RIGHT = 3,//右声道
I2S_STATUS_RXUDF = 8,//接收FIFO下溢标志
I2S_STATUS_RXOVF = 9,//接收FIFO溢出标志
I2S_STATUS_RXTHF = 10,//接收FIFO开始标志
I2S_STATUS_RXFULL = 11,//接收FIFO空
I2S_STATUS_RXEMPTY = 12,//接收FIFO空
I2S_STATUS_TXUDF = 16,//发送FIFO下溢标志
I2S_STATUS_TXOVF = 17,//发送FIFO溢出标志
I2S_STATUS_TXTHF = 18,//发送FIFO开始标志
I2S_STATUS_TXFULL = 19,//发送FIFO满
I2S_STATUS_TXEMPTY = 20,//发送FIFO空
I2S_STATUS_TXBUSY = 21,//发送忙
I2S_STATUS_RZCF = 22,//右声道过零标志
I2S_STATUS_LZCF = 23,//左声道过零标志
I2S_STATUS_RX_LEVEL = 24,//接收FIFO水平
I2S_STATUS_TX_LEVEL = 28,//发送FIFO水平
}NU_I2S_STATUS_ENUM;
typedef volatile union
{
NU_REG Regs;
I2S_STATUS_T Bits;
}NU_I2S_STATUS_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_I2S_CON_T CON;//I2S控制寄存器
__IO NU_I2S_CLKDIV_T CLKDIV;//I2S时钟分频寄存器
__IO NU_I2S_IE_T IE;//I2S中断使能寄存器
__IO NU_I2S_STATUS_T STATUS;//I2S状态寄存器
__O NU_REG_BITs TXFIFO;//I2S发送FIFO寄存器
__I NU_REG_BITs RXFIFO;//I2S接收FIFO寄存器
}NU_I2S_T;
//----------------------------------------------------//
#define I2Ss (*((NU_I2S_T *) I2S_BASE))//定位全局结构变量I2Ss
//----------------------------------------------------//
#define I2Sx ((NU_I2S_T *) I2S_BASE)
//----------------------------------------------------//
typedef enum
{
ACMP_CMPCR_CMPEN = 0,//比较器使能
ACMP_CMPCR_CMPIE = 1,//CMP中断使能
ACMP_CMPCR_CMP_HYSEN = 2,//CMP Hysterisis使能
ACMP_CMPCR_CMPCN = 4,//比较器负极输入选择
}NU_ACMP_CMPCR_ENUM;
typedef volatile union
{
NU_REG Regs;
ACMP_CMPCR_T Bits;
}NU_ACMP_CMPCR_T;
//----------------------------------------------------//
typedef enum
{
ACMP_CMPSR_CMPF0 = 0,//比较器0标志位
ACMP_CMPSR_CMPF1 = 1,//比较器1标志位
ACMP_CMPSR_CO0 = 2,//比较器0输出
ACMP_CMPSR_CO1 = 3,//比较器1输出
}NU_ACMP_CMPSR_ENUM;
typedef volatile union
{
NU_REG Regs;
ACMP_CMPSR_T Bits;
}NU_ACMP_CMPSR_T;
//----------------------------------------------------//
typedef struct
{
union{
__IO NU_ACMP_CMPCR_T CMPCR[2];//CMP控制寄存器01数组
struct{
__IO NU_ACMP_CMPCR_T CMPCR0;//CMP控制寄存器0
__IO NU_ACMP_CMPCR_T CMPCR1;//CMP控制寄存器1
};
};
__IO NU_ACMP_CMPSR_T CMPSR;//CMP状态寄存器
}NU_ACMP_T;
//----------------------------------------------------//
#define ACMPs (*((NU_ACMP_T *) ACMP_BASE))//定位全局结构变量ACMPs
//----------------------------------------------------//
#define ACMPx ((NU_ACMP_T *) ACMP_BASE)
//----------------------------------------------------//
typedef enum
{
EBI_CON_ExtEN = 0,//
EBI_CON_ExtBW16 = 1,//
EBI_CON_MCLKDIV = 8,//
EBI_CON_ExttALE = 16,//
}NU_EBI_CON_ENUM;
typedef volatile union
{
NU_REG Regs;
EBI_CON_T Bits;
}NU_EBI_CON_T;
//----------------------------------------------------//
typedef enum
{
EBI_TIME_ExttACC = 3,//
EBI_TIME_ExttAHD = 8,//
EBI_TIME_ExtIW2X = 12,//
EBI_TIME_ExtIR2W = 20,//
EBI_TIME_ExtIR2R = 24,//
}NU_EBI_TIME_ENUM;
typedef volatile union
{
NU_REG Regs;
EBI_TIME_T Bits;
}NU_EBI_TIME_T;
//----------------------------------------------------//
typedef struct
{
__IO NU_EBI_CON_T CON;//控制寄存器
__IO NU_EBI_TIME_T TIME;
}NU_EBI_T;
//----------------------------------------------------//
#define EBIs (*((NU_EBI_T *) EBI_BASE))//定位全局结构变量EBIs
//----------------------------------------------------//
#define EBIx ((NU_EBI_T *) EBI_BASE)
//-------------------------------------------------------//
typedef enum
{
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,
IRQ16, IRQ17, IRQ18, IRQ19, IRQ20, IRQ21, IRQ22, IRQ23,
IRQ24, IRQ25, IRQ26, IRQ27, IRQ28, IRQ29, IRQ30, IRQ31
}NU_IRQs_ENUM;
typedef volatile struct
{
NU_REG BOD_IRQn: 1;
NU_REG WDT_IRQn: 1;
NU_REG EINT0_IRQn: 1;
NU_REG EINT1_IRQn: 1;
NU_REG GPAB_IRQn: 1;
NU_REG GPCDE_IRQn: 1;
NU_REG PWMA_IRQn: 1;
NU_REG PWMB_IRQn: 1;
NU_REG TMR0_IRQn: 1;
NU_REG TMR1_IRQn: 1;
NU_REG TMR2_IRQn: 1;
NU_REG TMR3_IRQn: 1;
NU_REG UART0_IRQn: 1;
NU_REG UART1_IRQn: 1;
NU_REG SPI0_IRQn: 1;
NU_REG SPI1_IRQn: 1;
NU_REG SPI2_IRQn: 1;
NU_REG SPI3_IRQn: 1;
NU_REG I2C0_IRQn: 1;
NU_REG I2C1_IRQn: 1;
NU_REG CAN0_IRQn: 1;
NU_REG CAN1_IRQn: 1;
NU_REG SD_IRQn: 1;
NU_REG USBD_IRQn: 1;
NU_REG PS2_IRQn: 1;
NU_REG ACMP_IRQn: 1;
NU_REG PDMA_IRQn: 1;
NU_REG I2S_IRQn: 1;
NU_REG PWRWU_IRQn: 1;
NU_REG ADC_IRQn: 1;
NU_REG DAC_IRQn: 1;
NU_REG RTC_IRQn: 1;
}NU_IRQs;
typedef volatile union
{
__IO NU_REG Regs;
__IO NU_IRQs Bits;
}NU_REG_IRQs;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR0_PRI_0 = 0, //IRQ0优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR0_PRI_1 = 8, //IRQ1优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR0_PRI_2 = 16,//IRQ2优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR0_PRI_3 = 24 //IRQ3优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR0_ENUM;
typedef struct
{
__I NU_REG PRI_0:8;
__I NU_REG PRI_1:8;
__I NU_REG PRI_2:8;
__I NU_REG PRI_3:8;
}NU_NVIC_IPR0_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR0_Bits Bits;
}NU_NVIC_IPR0_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR1_PRI_4 = 0, //IRQ4优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR1_PRI_5 = 8, //IRQ5优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR1_PRI_6 = 16,//IRQ6优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR1_PRI_7 = 24 //IRQ7优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR1_ENUM;
typedef struct
{
__I NU_REG PRI_4:8;
__I NU_REG PRI_5:8;
__I NU_REG PRI_6:8;
__I NU_REG PRI_7:8;
}NU_NVIC_IPR1_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR1_Bits Bits;
}NU_NVIC_IPR1_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR2_PRI_8 = 0, //IRQ8优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR2_PRI_9 = 8, //IRQ9优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR2_PRI_10 = 16,//IRQ10优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR2_PRI_11 = 24 //IRQ11优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR2_ENUM;
typedef struct
{
__I NU_REG PRI_8:8;
__I NU_REG PRI_9:8;
__I NU_REG PRI_10:8;
__I NU_REG PRI_11:8;
}NU_NVIC_IPR2_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR2_Bits Bits;
}NU_NVIC_IPR2_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR_PRI_A = 0, //IRQ0,4,8,12,16,20,24,28优先级
NVIC_IPR_PRI_B = 8, //IRQ1,5,9,13,17,21,25,29优先级
NVIC_IPR_PRI_C = 16,//IRQ2,6,10,14,18,22,26,30优先级
NVIC_IPR_PRI_D = 24 //IRQ3,7,11,15,19,23,27,31优先级
}NU_NVIC_IPR_ENUM;
typedef struct
{
__I NU_REG PRI_A:8;
__I NU_REG PRI_B:8;
__I NU_REG PRI_C:8;
__I NU_REG PRI_D:8;
}NU_NVIC_IPR_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR_Bits Bits;
}NU_NVIC_IPR_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR3_PRI_12 = 0, //IRQ12优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR3_PRI_13 = 8, //IRQ13优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR3_PRI_14 = 16,//IRQ14优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR3_PRI_15 = 24 //IRQ15优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR3_ENUM;
typedef struct
{
__I NU_REG PRI_12:8;
__I NU_REG PRI_13:8;
__I NU_REG PRI_14:8;
__I NU_REG PRI_15:8;
}NU_NVIC_IPR3_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR3_Bits Bits;
}NU_NVIC_IPR3_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR4_PRI_16 = 0, //IRQ16优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR4_PRI_17 = 8, //IRQ17优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR4_PRI_18 = 16,//IRQ18优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR4_PRI_19 = 24 //IRQ19优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR4_ENUM;
typedef struct
{
__I NU_REG PRI_16:8;
__I NU_REG PRI_17:8;
__I NU_REG PRI_18:8;
__I NU_REG PRI_19:8;
}NU_NVIC_IPR4_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR4_Bits Bits;
}NU_NVIC_IPR4_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR5_PRI_20 = 0, //IRQ20优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR5_PRI_21 = 8, //IRQ21优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR5_PRI_22 = 16,//IRQ22优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR5_PRI_23 = 24 //IRQ23优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR5_ENUM;
typedef struct
{
__I NU_REG PRI_20:8;
__I NU_REG PRI_21:8;
__I NU_REG PRI_22:8;
__I NU_REG PRI_23:8;
}NU_NVIC_IPR5_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR5_Bits Bits;
}NU_NVIC_IPR5_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR6_PRI_24 = 0, //IRQ24优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR6_PRI_25 = 8, //IRQ25优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR6_PRI_26 = 16,//IRQ26优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR6_PRI_27 = 24 //IRQ27优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR6_ENUM;
typedef struct
{
__I NU_REG PRI_24:8;
__I NU_REG PRI_25:8;
__I NU_REG PRI_26:8;
__I NU_REG PRI_27:8;
}NU_NVIC_IPR6_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR6_Bits Bits;
}NU_NVIC_IPR6_T;
//----------------------------------------------------//
typedef enum
{
NVIC_IPR7_PRI_28 = 0, //IRQ28优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR7_PRI_29 = 8, //IRQ29优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR7_PRI_30 = 16,//IRQ30优先级(“0” 表示最高优先级& “3” 表示最低优先级)
NVIC_IPR7_PRI_31 = 24 //IRQ31优先级(“0” 表示最高优先级& “3” 表示最低优先级)
}NU_NVIC_IPR7_ENUM;
typedef struct
{
__I NU_REG PRI_28:8;
__I NU_REG PRI_29:8;
__I NU_REG PRI_30:8;
__I NU_REG PRI_31:8;
}NU_NVIC_IPR7_Bits;
typedef volatile union
{
NU_REG Regs;
NU_NVIC_IPR7_Bits Bits;
}NU_NVIC_IPR7_T;
//----------------------------------------------------//
typedef struct
{
__I NU_REG_IRQs ISER;//IRQ0~IRQ31设置使能控制寄存器
__I NU_REG RESERVED0[31];
__I NU_REG_IRQs ICER;//IRQ0~IRQ31清使能控制寄存器
__I NU_REG RSERVED1[31];
__I NU_REG_IRQs ISPR;//IRQ0~IRQ31设置挂起控制寄存器
__I NU_REG RESERVED2[31];
__I NU_REG_IRQs ICPR;//IRQ0~IRQ31清挂起控制寄存器
__I NU_REG RESERVED3[31];
__I NU_REG RESERVED4[64];
union{
__I NU_NVIC_IPR_T IPR[8];//IRQ0~IRQ31优先级控制寄存器
struct{
__I NU_NVIC_IPR0_T IPR0;//IRQ0~IRQ3优先级控制寄存器
__I NU_NVIC_IPR1_T IPR1;//IRQ4~IRQ7优先级控制寄存器
__I NU_NVIC_IPR2_T IPR2;//IRQ8~IRQ11优先级控制寄存器
__I NU_NVIC_IPR3_T IPR3;//IRQ12~IRQ15优先级控制寄存器
__I NU_NVIC_IPR4_T IPR4;//IRQ16~IRQ19优先级控制寄存器
__I NU_NVIC_IPR5_T IPR5;//IRQ20~IRQ23优先级控制寄存器
__I NU_NVIC_IPR6_T IPR6;//IRQ24~IRQ27优先级控制寄存器
__I NU_NVIC_IPR7_T IPR7;//IRQ28~IRQ31优先级控制寄存器
};
};
}NU_NVIC_Type;
//----------------------------------------------------//
#define NVICs (*((NU_NVIC_Type *) NVIC_BASE))//定位全局结构变量NVICs
//----------------------------------------------------//
#define NVICx ((NU_NVIC_Type *) NVIC_BASE)
//----------------------------------------------------//
#define NVICs_setPriority(vic, bit) VICs.IPR[(vic) >> 2].Regs |= (bit << 6) << (((vic) & 3) << 3)
//----------------------------------------------------//
typedef enum
{
SCB_CPUID_REVISION = 0,//值为0x0
SCB_CPUID_PARTNO = 4,//值为0xC20
SCB_CPUID_PART = 16,//ARMv6-M值为0xC
SCB_CPUID_IMPLEMENTER = 24,//由ARM分配执行码(ARM=0x41)
}NU_SCB_CPUID_ENUM;
typedef struct
{
__I NU_REG REVISION:4;
__I NU_REG PARTNO:12;
__I NU_REG PART:4;
__I NU_REG RESERVE:4;
__I NU_REG IMPLEMENTER:8;
}SCB_CPUID_T;
typedef volatile union
{
NU_REG Regs;
SCB_CPUID_T Bits;
}NU_SCB_CPUID_T;
typedef enum
{
SCB_ICSR_VECTACTIVE = 0,//0:线程模式 value > 1: 当前执行异常处理的数目
SCB_ICSR_VECTPENDING = 12,//表示最高优先级挂起异常的数目
SCB_ICSR_ISRPENDING = 22,//表示外部配置中断是否挂起
SCB_ICSR_ISRPREEMPT = 23,//如果置位，挂起异常生效，由调试停止状态退出
SCB_ICSR_PENDSTCLR = 25,//写1清除挂起SysTick
SCB_ICSR_PENDSTSET = 26,//设置挂起SysTick.由当前状态读回(1 if Pending,0 if not)
SCB_ICSR_PENDSVCLR = 27,//写1清PendSV中断
SCB_ICSR_PENDSVSET = 28,//设置PendSV 中断.通常用于请求内容切换.由当前状态读回(1 if Pending, 0 if not)
SCB_ICSR_NMIPENDSET = 31//
}NU_SCB_ICSR_ENUM;
typedef struct
{
__I NU_REG VECTACTIVE:9;
__I NU_REG VECTPENDING:9;
__I NU_REG ISRPENDING:1;
__I NU_REG ISRPREEMPT:1;
__I NU_REG RESERVE1:1;
__O NU_REG PENDSTCLR:1;
__IO NU_REG PENDSTSET:1;
__I NU_REG PENDSVCLR:1;
__IO NU_REG PENDSVSET:1;
__I NU_REG RESERVE2:2;
__IO NU_REG NMIPENDSET:1;
}SCB_ICSR_T;
typedef volatile union
{
NU_REG Regs;
SCB_ICSR_T Bits;
}NU_SCB_ICSR_T;
typedef enum
{
SCB_SCR_SLEEPONEXIT = 1,//设置为1,在异常返回到线程模式时,内核进入休眠状态
SCB_SCR_SLEEPDEEP = 2,//提示从休眠中唤醒需要较长时间
SCB_SCR_SEVONPEND = 4 //当使能时，中断由不活动到挂起，包括了唤醒事件(WFE指令)
}NU_SCB_SCR_ENUM;
typedef struct
{
__I NU_REG RESERVE0:1;
__I NU_REG SLEEPONEXIT:1;
__I NU_REG SLEEPDEEP:1;
__I NU_REG RESERVE1:1;
__O NU_REG SEVONPEND:1;
__I NU_REG RESERVE2:27;
}SCB_SCR_T;
typedef volatile union
{
NU_REG Regs;
SCB_ICSR_T Bits;
}NU_SCB_SCR_T;
typedef struct
{
__I NU_SCB_CPUID_T CPUID;//CPUID Base 寄存器
__IO NU_SCB_ICSR_T ICSR;//中断控制状态寄存器
__I NU_REG RESERVED0;
__IO NU_REG_BITs AIRCR;
__IO NU_SCB_SCR_T SCR;//系统控制寄存器
__IO NU_REG_BITs CCR;
__I NU_REG RESERVED1;
union{
__IO NU_REG_BITs SHP[2];//系统处理器优先级寄存器2和3
struct{
__IO NU_REG_BITs SHP2;//系统处理器优先级寄存器2
__IO NU_REG_BITs SHP3;//系统处理器优先级寄存器3
};
};
__IO NU_REG_BITs SHCSR;
__I NU_REG RESERVED2[2];
__IO NU_REG_BITs DFSR;
}NU_SCB_Type;
//----------------------------------------------------//
#define SCBs (*((NU_SCB_Type *) SCB_BASE))//定位全局结构变量SCBs
//----------------------------------------------------//
#define SCBx ((NU_SCB_Type *) SCB_BASE)
//----------------------------------------------------//
typedef enum
{
SysTick_CTRL_TICKENABLE = 0,//计数器运行于multi-shot manner.
SysTick_CTRL_TICKINT = 1,//向下计数到0将引起SysTick 异常而挂起.
SysTick_CTRL_CLKSRC = 2,//如果没有外部时钟时，可用内核时钟作SysTick, 该位被读为1 ，不能写.
SysTick_CTRL_COUNTFLAG = 16//计数由1到0时，COUNTFLAG 置位.
}NU_SysTick_CTRL_ENUM;
typedef struct
{
__IO NU_REG TICKENABLE:1;
__IO NU_REG TICKINT:1;
__IO NU_REG CLKSRC:1;
__IO NU_REG RESERVE0:13;
__IO NU_REG COUNTFLAG:1;
__IO NU_REG RESERVE1:15;
}SysTick_CTRL_T;
typedef volatile union
{
NU_REG Regs;
SysTick_CTRL_T Bits;
}NU_SysTick_CTRL_T;
typedef enum
{
SysTick_LOAD_RELOAD = 0,//当计数器达到0时，值加载到当前值寄存器
}NU_SysTick_LOAD_ENUM;
typedef struct
{
__IO NU_REG RELOAD:24;
__IO NU_REG RESERVE:8;
}SysTick_LOAD_T;
typedef volatile union
{
NU_REG Regs;
SysTick_LOAD_T Bits;
}NU_SysTick_LOAD_T;
typedef enum
{
SysTick_VAL_CURRENT = 0,//当前计数值，为采样时刻的计数器的值
}NU_SysTick_VAL_ENUM;
typedef struct
{
__IO NU_REG CURRENT:24;
__IO NU_REG RESERVE:8;
}SysTick_VAL_T;
typedef volatile union
{
NU_REG Regs;
SysTick_VAL_T Bits;
}NU_SysTick_VAL_T;
typedef struct
{
__IO NU_SysTick_CTRL_T CTRL;//SysTick控制与状态
__IO NU_SysTick_LOAD_T LOAD;//SysTick重新加载值
__IO NU_SysTick_VAL_T VAL;//SysTick当前值
__I NU_REG_BITs CALIB;
}NU_SysTick_Type;
//----------------------------------------------------//
#define SysTicks (*((NU_SysTick_Type *) SysTick_BASE))//定位全局结构变量SysTicks
//----------------------------------------------------//
#define SysTickx ((NU_SysTick_Type *) SysTick_BASE)
//----------------------------------------------------//
typedef struct
{
__IO NU_REG_BITs DHCSR;
__O NU_REG_BITs DCRSR;
__IO NU_REG_BITs DCRDR;
__IO NU_REG_BITs DEMCR;
}NU_CoreDebug_Type;
//----------------------------------------------------//
#define CoreDebugs (*((NU_CoreDebug_Type *) CoreDebug_BASE))//定位全局结构变量CoreDebugs
//----------------------------------------------------//
#define CoreDebugx ((NU_CoreDebug_Type *) CoreDebug_BASE)
//----------------------------------------------------//
#ifdef __cplusplus
}
#endif
#endif /* __NUC1xxcfg_H__ */
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