我用的是ISE12.2, 加了2个DCM,一个分频到10M,然后10M连接到后面一个DCM,继续分频,综合是通过了,但是在Implement时候出了,信息如下:
ERROR:NgdBuild:770 - IBUFG 'DCM_PWM/CLKIN_IBUFG_INST' and BUFG
'CLK_10M_50M/CLKFX_BUFG_INST' on net 'CLK10M' are lined up in series. Buffers
of the same direction cannot be placed in series.
ERROR:NgdBuild:924 - input pad net 'CLK10M' is driving non-buffer primitives:
我认为是第一级的DCM输出带了BUFG造成的,我就在IP核设置里把BUFG去掉了,直接用的LOCATL Routing,结果报了如下错误:
ERROR:NgdBuild:455 - logical net 'CLK10M' has multiple driver(s):
CLK10M这个signal仅仅只是连接了这两个DCM....请高手指教 |
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