DSP输入接口注意事项
Although it is possible to have a fundamental motor controller that is completely 3.3V, there are indeed situations where interfacing between 3.3V and 5V cannot be avoided. Several different types of interface situations to the DSP input pins are presented in the following subsections.
DSP input pins sometimes have internal pull-up or pull-down circuits. These circuits approach ideal current sources given a fixed Vcc. As such, they will not affect impedance calculations (RC time constants) for the interface circuitry; however, they can substantially affect dc bias. Be sure to check the device-specific data sheet for information on pin pull-up and pull-down and rated current before making bias calculations. To simplify the discussion, the following examples do not take into account the internal pull-ups or pull-downs.
5V TTL Output to 3.3V DSP CMOS Input
The high-output voltage level (Voh) of TTL output is typically 3.4V at rated current, and 4.05V at no-load, when supplied with maximum supply voltage of 5.25V (Vcc5-max). The tolerable high-input voltage (Vih) of 3.3V DSP is (Vcc3 + 0.3V), where Vcc3 is the 3.3V supply. Since we must assume the worst-case differential voltage between the devices, we set Vcc3 = 3.0V, thus the maximum differential voltage for logic high is 0.75V.
If we wish to limit the current to 75uA, then placing a 10K-ohm resistor between the TTL output and 3.3V CMOS input will suffice. This will create a small typical RC delay of about 10K נ5pF = 50nS. This delay should be negligible in any case, except, perhaps CAN (or J1850) transceivers that are subject to a maximum round-trip time. Higher resistance values can be used to limit the current further down. However, the delay becomes bigger and noise immunity gets worse as the resistance value goes up. The interface technique presented in Figure 2 interfaces a 5V TTL to a 3.3V CMOS, which can be used if current limit is an important concern.
Figure 2. 5V TTL output to 3.3V DSP CMOS input.
This same technique will work for an open emitter pull-up, except that the falling time constant will be longer considering that there is now a transistor emitter capacitance to deal with.
5V CMOS Output to 3.3V DSP CMOS Input
Using the same analysis as above, the Voh level of 5V CMOS outputs is typically 5.25V at no-load and a Vcc5-max of 5.25V. The maximum differential voltage for logic high is, therefore, 1.95V, which presents a slightly more difficult problem. In this case, we need to add a resistor divider network (Figure 3), such that a signal voltage level of 5.25V appears at the input of DSP as 3.0V. Since the divider is referenced to ground, 0V signal voltage appears as 0V at the DSP input.
Figure 3. 5V CMOS output to 3.3V DSP CMOS input.
Using the same argument from the previous section that 10K source impedance yields an acceptable time constant, we can select the two resistors of the divider to be R1=18K and R2=22K. Using these values, a 5.25V output voltage of an off-chip component yields a 2.9V voltage level at the DSP CMOS input. The Ioh current will be limited to 130uA and the impedance seen by the DSP CMOS input will be 9900 ohms. The resistance values can be smaller if the current limit is set to a higher value, resulting in a lower source impedance value.
This technique will work exactly the same for an open-source pull-up, except that the falling time constant will be longer considering that there is now a transistor drain capacitance to deal with during fall time.
Open Drain/Open Collector Output to 3.3V DSP CMOS Input
This is not a 3.3V-to-5V interfacing issue (unless the output has to be pulled up to 5V, which usually should not be the case). However, it exists as a general interfacing problem in typical applications. This type of input requires a pull-up resistor to the 3.3V power rail (Figure 4). Considering the significant increase in capacitance, Cjunction, due to the drain/collector junction, the rise time, Tr = Rpu * (5pF + Cjunction), will be slowed unless the pull-up resistor is reduced from the usual 10K ohms.
![]()
![]()
|
|
楼主
标题置顶
标题高亮
