/******************************************************************************
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V3.00
* $Revision: 8 $
* $Date: 14/02/10 2:43p $
* [url=home.php?mod=space&uid=247401]@brief[/url] FMC erase/program/read sample program for M051 series MCU
*
* @note
* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#include <stdio.h>
#include "M051Series.h"
#define PLLCON_SETTING CLK_PLLCON_50MHz_HXT
#define PLL_CLOCK 50000000
#define APROM_TEST_BASE 0x3000
#define APROM_TEST_END 0x10000
#define DATA_FLASH_TEST_BASE (FMC->DFBADR)
#define DATA_FLASH_TEST_END (FMC->DFBADR + 0x1000)
#define TEST_PATTERN 0x5A5A5A5A
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable External XTAL (4~24 MHz) */
CLK->PWRCON |= CLK_PWRCON_XTL12M_EN_Msk;
CLK->PLLCON = PLLCON_SETTING;
/* Waiting for clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk | CLK_CLKSTATUS_XTL12M_STB_Msk);
/* Switch HCLK clock source to PLL */
CLK->CLKSEL0 = CLK_CLKSEL0_HCLK_S_PLL;
/* Enable IP clock */
CLK->APBCLK = CLK_APBCLK_UART0_EN_Msk;
/* Select IP clock source */
CLK->CLKSEL1 = CLK_CLKSEL1_UART_S_HXT;
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
//SystemCoreClockUpdate();
PllClock = PLL_CLOCK; // PLL
SystemCoreClock = PLL_CLOCK / 1; // HCLK
CyclesPerUs = PLL_CLOCK / 1000000; // For SYS_SysTickDelay()
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set P3 multi-function pins for UART0 RXD and TXD */
SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;
}
void UART_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
UART_Open(UART0, 115200);
}
static int SetDataFlashBase(uint32_t u32DFBA)
{
uint32_t au32Config[1];
/* Read current User Configuration */
FMC_ReadConfig(au32Config, 1);
/* Just return when Data Flash has been enabled */
if(!(au32Config[0] & 0x1))
return 0;
/* Enable User Configuration Update */
FMC_EnableConfigUpdate();
/* Erase User Configuration */
FMC_Erase(FMC_CONFIG_BASE);
/* Write User Configuration to Enable Data Flash */
au32Config[0] &= ~0x1;
if(FMC_WriteConfig(au32Config, 1))
return -1;
printf("\nSet Data Flash base as 0x%x.\n", FMC_ReadDataFlashBaseAddr());
/* Perform chip reset to make new User Config take effect */
SYS->IPRSTC1 |= SYS_IPRSTC1_CHIP_RST_Msk;
return 0;
}
int32_t FillDataPattern(uint32_t u32StartAddr, uint32_t u32EndAddr, uint32_t u32Pattern)
{
uint32_t u32Addr;
for(u32Addr = u32StartAddr; u32Addr < u32EndAddr; u32Addr += 4)
{
FMC_Write(u32Addr, u32Pattern);
}
return 0;
}
int32_t VerifyData(uint32_t u32StartAddr, uint32_t u32EndAddr, uint32_t u32Pattern)
{
uint32_t u32Addr;
uint32_t u32Data;
for(u32Addr = u32StartAddr; u32Addr < u32EndAddr; u32Addr += 4)
{
u32Data = FMC_Read(u32Addr);
if(u32Data != u32Pattern)
{
printf("\nFMC_Read data verify failed at address 0x%x, read=0x%x, expect=0x%x\n", u32Addr, u32Data, u32Pattern);
return -1;
}
}
return 0;
}
int32_t FlashTest(uint32_t u32StartAddr, uint32_t u32EndAddr, uint32_t u32Pattern)
{
uint32_t u32Addr;
for(u32Addr = u32StartAddr; u32Addr < u32EndAddr; u32Addr += FMC_FLASH_PAGE_SIZE)
{
printf(" Flash test address: 0x%x \r", u32Addr);
// Erase page
FMC_Erase(u32Addr);
// Verify if page contents are all 0xFFFFFFFF
if(VerifyData(u32Addr, u32Addr + FMC_FLASH_PAGE_SIZE, 0xFFFFFFFF) < 0)
{
printf("\nPage 0x%x erase verify failed!\n", u32Addr);
return -1;
}
// Write test pattern to fill the whole page
if(FillDataPattern(u32Addr, u32Addr + FMC_FLASH_PAGE_SIZE, u32Pattern) < 0)
{
printf("Failed to write page 0x%x!\n", u32Addr);
return -1;
}
// Verify if page contents are all equal to test pattern
if(VerifyData(u32Addr, u32Addr + FMC_FLASH_PAGE_SIZE, u32Pattern) < 0)
{
printf("\nData verify failed!\n ");
return -1;
}
FMC_Erase(u32Addr);
// Verify if page contents are all 0xFFFFFFFF
if(VerifyData(u32Addr, u32Addr + FMC_FLASH_PAGE_SIZE, 0xFFFFFFFF) < 0)
{
printf("\nPage 0x%x erase verify failed!\n", u32Addr);
return -1;
}
}
printf("\r Flash Test Passed. \n");
return 0;
}
int main()
{
uint32_t i, u32Data;
/* Unlock protected registers */
SYS_UnlockReg();
SYS_Init();
UART_Init();
/*
This sample code is used to show how to use StdDriver API to implement ISP functions.
*/
printf("\n\n");
printf("+----------------------------------------+\n");
printf("| M051 FMC Sample Code |\n");
printf("+----------------------------------------+\n");
SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
if(SetDataFlashBase(DATA_FLASH_TEST_BASE) < 0)
{
printf("Failed to set Data Flash base address!\n");
goto lexit;
}
/* Read BS */
printf(" Boot Mode ............................. ");
if(FMC_GetBootSource() == 0)
printf("[APROM]\n");
else
{
printf("[LDROM]\n");
printf(" WARNING: The driver sample code must execute in AP mode!\n");
goto lexit;
}
u32Data = FMC_ReadCID();
printf(" Company ID ............................ [0x%08x]\n", u32Data);
u32Data = FMC_ReadDID();
printf(" Device ID ............................. [0x%08x]\n", u32Data);
u32Data = FMC_ReadPID();
printf(" Product ID ............................ [0x%08x]\n", u32Data);
for(i = 0; i < 3; i++)
{
u32Data = FMC_ReadUID(i);
printf(" Unique ID %d ........................... [0x%08x]\n", i, u32Data);
}
for(i = 0; i < 4; i++)
{
u32Data = FMC_ReadUCID(i);
printf(" Unique Customer ID %d .................. [0x%08x]\n", i, u32Data);
}
/* Read User Configuration */
printf(" User Config 0 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE));
printf(" User Config 1 ......................... [0x%08x]\n", FMC_Read(FMC_CONFIG_BASE + 4));
/* Read Data Flash base address */
u32Data = FMC_ReadDataFlashBaseAddr();
printf(" Data Flash Base Address ............... [0x%08x]\n", u32Data);
printf("\n\nLDROM test =>\n");
FMC_EnableLDUpdate();
if(FlashTest(FMC_LDROM_BASE, FMC_LDROM_BASE + FMC_LDROM_SIZE, TEST_PATTERN) < 0)
{
printf("\n\nLDROM test failed!\n");
goto lexit;
}
FMC_DisableLDUpdate();
printf("\n\nAPROM test =>\n");
FMC_EnableAPUpdate();
if(FlashTest(APROM_TEST_BASE, APROM_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nAPROM test failed!\n");
goto lexit;
}
FMC_DisableAPUpdate();
printf("\n\nData Flash test =>\n");
if(FlashTest(DATA_FLASH_TEST_BASE, DATA_FLASH_TEST_END, TEST_PATTERN) < 0)
{
printf("\n\nData Flash test failed!\n");
goto lexit;
}
lexit:
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
printf("\nFMC Sample Code Completed.\n");
while(1);
}
/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
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