我用LPC2478连接STN液晶320*240，就是老的50174，出现有时钟信号，且按照我设置的频率，但场、行无信号，引脚配置为高有效是一直保持低、低有效时一直保持高，各位有没有STN的例子，看看有什么错误
// LCD管脚配置
PINSEL4 &= BIN32(11111111,11110000,00000000,00001111);
PINSEL4 |= BIN32(00000000,00001111,11111111,11110000);
PINMODE4 &= BIN32(11111111,11110000,00000000,00001111);
// PINMODE4 |= BIN32(00000000,00001010,10101010,10100000);
PINSEL10 = 0x00;
// LCD端口配置：单色、4bit单显
PINSEL11 = 0x01;
// LCD display
LCD_DISP_SEL = 0;
LCD_DISP_MODE = 3;
LCD_DISP_FDIR = 1;
LCD_DISP_ON();
// LCD控制寄存器
PCONP_bit.PCLCD = 1; // LCD电源控制位启动
LCD_CTRL = 0;
LCD_CTRL_bit.LcdPwr = 0; // disable power
LCD_CTRL_bit.LcdEn = 0; // 禁止LCD
LCD_CTRL_bit.LcdBpp = 0; // 1 bpp
LCD_CTRL_bit.LcdBW = 1; // monochrome
LCD_CTRL_bit.LcdTFT = 0; // 灰度
LCD_CTRL_bit.LcdMono8 = 0; // 4位
LCD_CTRL_bit.LcdDual = 0; // 单屏
LCD_CTRL_bit.BGR = 0; // notmal output
LCD_CTRL_bit.BEBO = 0; // little endian byte order
LCD_CTRL_bit.BEPO = 0; // little endian pix order
// LCD像素、时钟寄存器
LCD_CFG_bit.CLKDIV = 0x1f; // SYS_GetFsclk() / (U32)C_GLCD_PIX_CLK;
LCD_POL_bit.BCD = 1; // bypass inrenal clk divider
LCD_POL_bit.CLKSEL = 0; // clock source for the LCD block is HCLK
LCD_POL_bit.IVS = 0; // LCDFP pin is active LOW and inactive HIGH
LCD_POL_bit.IHS = 0; // LCDLP pin is active LOW and inactive HIGH
LCD_POL_bit.IPC = 0; // data is driven out into the LCD on the falling edge
LCD_POL_bit.IOE = 1; // active high
LCD_POL_bit.ACB = 31; //
LCD_POL_bit.PCD_LO = 2;
LCD_POL_bit.PCD_HI = 0;
LCD_POL_bit.CPL = (LCD_H_SIZE/4) - 1;
// init Horizontal Timing
LCD_TIMH_bit.HBP = (19);
LCD_TIMH_bit.HFP = (17);
LCD_TIMH_bit.HSW = (1);
LCD_TIMH_bit.PPL = (LCD_H_SIZE/16) - 1;
// init Vertical Timing
LCD_TIMV_bit.VBP = 12;
LCD_TIMV_bit.VFP = 19;
LCD_TIMV_bit.VSW = 1;
LCD_TIMV_bit.LPP = LCD_V_SIZE - 1;
// Frame Base Address doubleword aligned
LCD_UPBASE = LCD_VRAM_BASE_ADDR & ~7UL ;
LCD_LPBASE = LCD_VRAM_BASE_ADDR & ~7UL ;
LCD_CTRL_bit.LcdEn = 1; // 使能LCD
for(volatile U32 i = 100; i;i--);
LCD_CTRL_bit.LcdPwr = 1; // |
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