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【转】Altera官方视频教程

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gaochy1126|  楼主 | 2018-5-31 21:28 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

Altera培训中心,支持在线学习
http://www.altera.com.cn/education/courses/crs-index.html

教程官方地址:
注:标号为1的是在线学习,标号为2的是直接复制到IE下载教程文件。
Altera产品和资源入门指南 0.5小时 20100321
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1.http://mysupport.altera.com/etra ... irst_CN/player.html
2.http://mysupport.altera.com/etra ... /ReadMeFirst_CN.zip
2011.02.13
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怎样开始一个简单的FPGA设计 1小时 20100330
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1.http://mysupport.altera.com/etra ... sign_CN/player.html
2.http://mysupport.altera.com/etra ... _FPGA_Design_CN.zip
simple_counter  2011.02.13
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配置Altera FPGA 2小时 20100330

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1.http://www.altera.com/customertr ... TIon_CN/player.html
2.http://www.altera.com/customertr ... onfiguration_CN.zip
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Cyclone IV FPGA:特性和功能 0.5小时 20100330
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1.http://www.altera.com/customertr ... neIV_CN/player.html
2.http://www.altera.com/customertr ... CN/CycloneIV_CN.zip
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使用Quartus II 软件:简介 1.0小时 20100401
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1.http://mysupport.altera.com/etra ... ntro_CN/player.html
2.http://mysupport.altera.com/etra ... CN/QII_Intro_CN.zip
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2011.02.13
Notes:http://www.altera.com/literature/lit-qts.jsp可以下载handbook,并且Q软件的help里面有简单的教程指导。
Verilog HDL基础 0.5小时 20100330
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1.http://mysupport.altera.com/etra ... ilog_CN/player.html
2.http://mysupport.altera.com/etra ... g_CN/Verilog_CN.zip
主要内容:Verilog HDL语言的基本语法和结构。
HDL 硬件描述语言  RTL 寄存器传送级
对于大小写敏感,与C语言相似。
参考资料:
--高级综合手册:http://www.altera.com/literature/manual/stx_cookbook.pdf,Advanced Synthesis Cookbook_ A Design Guide for Stratix II, Stratix III, and Stratix IV Devices.pdf
--Quartus II 手册第1卷,综合和设计
--“Verilog HDL入门”。8小时由教师指导的课程
--“高级Verilog HDL设计”。8小时由教师指导的课程
2011.02.14
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VHDL 基础 1小时 20100322

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1.http://mysupport.altera.com/etraining/webex/VHDL_CN/player.html
2.http://mysupport.altera.com/etraining/webex/VHDL_CN/VHDL_CN.zip
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可编程逻辑基础 1小时 20100322
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1.http://mysupport.altera.com/etra ... sics_CN/player.html
2.http://mysupport.altera.com/etra ... CN/PLDBasics_CN.zip
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使用Quartus II 软件:基础 8小时

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1.http://www.altera.com/customertr ... tion_CN/player.html

The lab exercise files & the presentation:

补充文件:http://www.altera.com/customertr ... ndation/F_Files.zip

To run the course off line:
2.http://www.altera.com/customertr ... N/CH_Foundation.zip
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Quartus II 软件中的原理图设计 1小时

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1.http://mysupport.altera.com/etra ... atic_CN/player.html
2.http://mysupport.altera.com/etra ... CN/Schematic_CN.zip
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Quartus II 软件中的仿真 0.5小时

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1.http://mysupport.altera.com/etra ... tion_CN/player.html

2.http://mysupport.altera.com/etra ... N/Simulation_CN.zip
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SignalTap II 逻辑分析仪的使用 1小时

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1.http://mysupport.altera.com/etraining/webex/STAP_CN/player.html

2.http://mysupport.altera.com/etraining/webex/STAP_CN/STAP_CN.zip


顾问和设计空间勘察器实现时序逼近
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1.http://www.altera.com/customertr ... _DSE_CN/player.html
2.http://www.altera.com/customertr ... gClosure_DSE_CN.zip

高级I/O系统设计
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1.http://www.altera.com/customertr ... sign_CN/player.html
2.http://www.altera.com/customertr ... ystem_Design_CN.zip

使用Quartus II 物理综合优化功能实现时序逼近
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1.http://www.altera.com/customertr ... _Syn_CN/player.html
2.http://www.altera.com/customertr ... sure_Phy_Syn_CN.zip

Nios II 处理器开发软件:工具简介
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1.https://mysupport.altera.com/etr ... view_CN/player.html
2.https://mysupport.altera.com/etr ... _CN/Overview_CN.zip

Nios II 处理器开发软件:设计流程
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1.https://mysupport.altera.com/etr ... Flow_CN/player.html
2.https://mysupport.altera.com/etr ... Flow_CN/Flow_CN.zip

Nios II 处理器开发软件:调试入门
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1.https://mysupport.altera.com/etr ... ebug_CN/player.html
2.https://mysupport.altera.com/etr ... N/N_Sw_Debug_CN.zip

Nios II 处理器开发软件:HAL入门
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1.https://mysupport.altera.com/etr ... _HAL_CN/player.html

2.https://mysupport.altera.com/etr ... w_HAL_CN/HAL_CN.zip

Nios II 处理器开发软件:Nios II IDE
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1.https://mysupport.altera.com/etr ... _IDE_CN/player.html
2.https://mysupport.altera.com/etr ... N/NiosII_IDE_CN.zip

Nios II 处理器开发软件:MMU和MPU
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1.https://mysupport.altera.com/etr ... UMPU_CN/player.html
2.https://mysupport.altera.com/etr ... PU_CN/MMUMPU_CN.zip

Nios II 浮点定制指令
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1.http://www.altera.com/customertr ... Inst_CN/player.html
2.http://www.altera.com/customertr ... Pt_Cust_Inst_CN.zip

收发器基础
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1.https://mysupport.altera.com/etr ... sics_CN/player.html
2.https://mysupport.altera.com/etr ... eiver_Basics_CN.zip

利用TimeQuest静态时序分析器来验证性能
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1.https://mysupport.altera.com/etr ... uest_CN/player.html
2.https://mysupport.altera.com/etr ... CN/Timequest_CN.zip

转换到TimeQuest时序分析器
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1.https://mysupport.altera.com/etr ... h_TQ_CN/player.html

2.https://mysupport.altera.com/etr ... CN/Switch_TQ_CN.zip

采用Stratix IV GX FPGA进行10/100/1000 Mb & 10Gb以太网设计
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1.https://mysupport.altera.com/etr ... rnet_CN/player.html
2.https://mysupport.altera.com/etr ... _CN/Ethernet_CN.zip

采用Stratix IV GX FPGA设计PCI Express
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1.https://mysupport.altera.com/etr ... IVGX_CN/player.html
2.https://mysupport.altera.com/etr ... CN/PCI_SIVGX_CN.zip

采用Stratix IV GX FPGA设计Serial RapidIO
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1.https://mysupport.altera.com/etr ... IVGX_CN/player.html
2.https://mysupport.altera.com/etr ... N/SRIO_SIVGX_CN.zip

Stratix III 和Stratix IV FPGA电源分配网络设计

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1.http://www.altera.com/customertraining/webex/PDN_CN/player.html
2.http://www.altera.com/customertraining/webex/PDN_CN/PDN_CN.zip


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