例子里这么写的
/* Vref connect to AVDD */
SYS->VREFCTL |= SYS_VREFCTL_VREF_AVDD;
对应的头文件部分内容如下
/* VREFCTL constant definitions. (Write-Protection Register) */
/*---------------------------------------------------------------------------------------------------------*/
#define SYS_VREFCTL_VREF_2_65V (0x03UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 2.56V \hideinitializer */
#define SYS_VREFCTL_VREF_2_048V (0x07UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 2.048V \hideinitializer */
#define SYS_VREFCTL_VREF_3_072V (0x0BUL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 3.072V \hideinitializer */
#define SYS_VREFCTL_VREF_4_096V (0x0FUL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= 4.096V \hideinitializer */
#define SYS_VREFCTL_VREF_AVDD (0x10UL<<SYS_VREFCTL_VREFCTL_Pos) /*!< VOUT= AVDD \hideinitializer */
#define SYS_VREFCTL_ADCMODESEL_EADC (0x1UL<<SYS_VREFCTL_ADCMODESEL_Pos) /*!< EADC mode \hideinitializer */
#define SYS_VREFCTL_ADCMODESEL_ADC (0x0UL<<SYS_VREFCTL_ADCMODESEL_Pos) /*!< ADC mode \hideinitializer */
#define SYS_VREFCTL_PWMSYNCMODE_EN (0x1UL<<SYS_VREFCTL_PWMSYNCMODE_Pos)/*!<PWM SYNC MODE ENABLED, PWM engine clock is same as HCLK \hideinitializer */
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