stm32 dma驱动

只看该作者 · 2018-9-18 23:50

static uint32_t EDMA_GetInstance(DMA_Type *base)
{
uint32_t instance;

/* Find the instance index from base address mappings. */
for (instance = 0; instance < FSL_FEATURE_SOC_EDMA_COUNT; instance++)
{
      if (s_edmaBases[instance] == base)
      {
         break;
      }
}

assert(instance < FSL_FEATURE_SOC_EDMA_COUNT);

return instance;
}

只看该作者 · 2018-9-18 23:51

static void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
assert(tcd != NULL);
assert(((uint32_t)tcd & 0x1FU) == 0);

/* Push tcd into hardware TCD register */
base->TCD[channel].SADDR = tcd->SADDR;
base->TCD[channel].SOFF = tcd->SOFF;
base->TCD[channel].ATTR = tcd->ATTR;
base->TCD[channel].NBYTES_MLNO = tcd->NBYTES;
base->TCD[channel].SLAST = tcd->SLAST;
base->TCD[channel].DADDR = tcd->DADDR;
base->TCD[channel].DOFF = tcd->DOFF;
base->TCD[channel].CITER_ELINKNO = tcd->CITER;
base->TCD[channel].DLAST_SGA = tcd->DLAST_SGA;
/* Clear DONE bit first, otherwise ESG cannot be set */
base->TCD[channel].CSR = 0;
base->TCD[channel].CSR = tcd->CSR;
base->TCD[channel].BITER_ELINKNO = tcd->BITER;
}

只看该作者 · 2018-9-18 23:51

void EDMA_Init(DMA_Type *base, const edma_config_t *config)
{
assert(config != NULL);

uint32_t tmpreg;

/* Ungate EDMA periphral clock */
CLOCK_EnableClock(s_edmaClockName[EDMA_GetInstance(base)]);
/* Configure EDMA peripheral according to the configuration structure. */
tmpreg = base->CR;
tmpreg &= ~(DMA_CR_ERCA_MASK | DMA_CR_HOE_MASK | DMA_CR_CLM_MASK | DMA_CR_EDBG_MASK);
tmpreg |= (DMA_CR_ERCA(config->enableRoundRobinArbitration) | DMA_CR_HOE(config->enableHaltOnError) |
DMA_CR_CLM(config->enableContinuousLinkMode) | DMA_CR_EDBG(config->enableDebugMode) | DMA_CR_EMLM(true));
base->CR = tmpreg;
}

只看该作者 · 2018-9-18 23:51

void EDMA_Deinit(DMA_Type *base)
{
/* Gate EDMA periphral clock */
CLOCK_DisableClock(s_edmaClockName[EDMA_GetInstance(base)]);
}

只看该作者 · 2018-9-18 23:54

void EDMA_GetDefaultConfig(edma_config_t *config)
{
assert(config != NULL);

config->enableRoundRobinArbitration = false;
config->enableHaltOnError = true;
config->enableContinuousLinkMode = false;
config->enableDebugMode = false;
}

只看该作者 · 2018-9-18 23:54

void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

EDMA_TcdReset((edma_tcd_t *)&base->TCD[channel]);
}

只看该作者 · 2018-9-18 23:55

void EDMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
assert(config != NULL);
assert(((uint32_t)nextTcd & 0x1FU) == 0);

EDMA_TcdSetTransferConfig((edma_tcd_t *)&base->TCD[channel], config, nextTcd);
}

只看该作者 · 2018-9-18 23:56

void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
assert(config != NULL);

uint32_t tmpreg;

tmpreg = base->TCD[channel].NBYTES_MLOFFYES;
tmpreg &= ~(DMA_NBYTES_MLOFFYES_SMLOE_MASK | DMA_NBYTES_MLOFFYES_DMLOE_MASK | DMA_NBYTES_MLOFFYES_MLOFF_MASK);
tmpreg |=
(DMA_NBYTES_MLOFFYES_SMLOE(config->enableSrcMinorOffset) |
DMA_NBYTES_MLOFFYES_DMLOE(config->enableDestMinorOffset) | DMA_NBYTES_MLOFFYES_MLOFF(config->minorOffset));
base->TCD[channel].NBYTES_MLOFFYES = tmpreg;
}

只看该作者 · 2018-9-18 23:56

void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);
assert(linkedChannel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

EDMA_TcdSetChannelLink((edma_tcd_t *)&base->TCD[channel], type, linkedChannel);
}

只看该作者 · 2018-9-18 23:57

void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

base->TCD[channel].CSR = (base->TCD[channel].CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(bandWidth);
}

只看该作者 · 2018-9-18 23:58

void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

uint32_t tmpreg;

tmpreg = base->TCD[channel].ATTR & (~(DMA_ATTR_SMOD_MASK | DMA_ATTR_DMOD_MASK));
base->TCD[channel].ATTR = tmpreg | DMA_ATTR_DMOD(destModulo) | DMA_ATTR_SMOD(srcModulo);
}

只看该作者 · 2018-9-18 23:59

void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

/* Enable error interrupt */
if (mask & kEDMA_ErrorInterruptEnable)
{
      base->EEI |= (0x1U << channel);
}

/* Enable Major interrupt */
if (mask & kEDMA_MajorInterruptEnable)
{
      base->TCD[channel].CSR |= DMA_CSR_INTMAJOR_MASK;
}

/* Enable Half major interrupt */
if (mask & kEDMA_HalfInterruptEnable)
{
      base->TCD[channel].CSR |= DMA_CSR_INTHALF_MASK;
}
}

只看该作者 · 2018-9-18 23:59

void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)
{
assert(channel < FSL_FEATURE_EDMA_MODULE_CHANNEL);

/* Disable error interrupt */
if (mask & kEDMA_ErrorInterruptEnable)
{
      base->EEI &= ~(0x1U << channel);
}

/* Disable Major interrupt */
if (mask & kEDMA_MajorInterruptEnable)
{
      base->TCD[channel].CSR &= ~DMA_CSR_INTMAJOR_MASK;
}

/* Disable Half major interrupt */
if (mask & kEDMA_HalfInterruptEnable)
{
      base->TCD[channel].CSR &= ~DMA_CSR_INTHALF_MASK;
}
}

只看该作者 · 2018-9-19 08:55

赞一个

1万 · 2018-10-9 09:42

很详细感谢分享