void PE_low_level_init(void)
{
#ifdef PEX_RTOS_INIT
PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */
#endif
/* Common initialization of the CPU registers */
/* APCTL1: ADPC7=1,ADPC6=1,ADPC5=1,ADPC1=1 */
setReg8Bits(APCTL1, 0xE2U);
/* APCTL2: ADPC11=1,ADPC10=1,ADPC9=1 */
setReg8Bits(APCTL2, 0x0EU);
/* PTASE: PTASE7=0,PTASE6=0,PTASE5=0,PTASE4=0,PTASE3=0,PTASE2=0,PTASE1=0,PTASE0=0 */
setReg8(PTASE, 0x00U);
/* PTBSE: PTBSE7=0,PTBSE6=0,PTBSE5=0,PTBSE4=0,PTBSE3=0,PTBSE2=0,PTBSE1=0,PTBSE0=0 */
setReg8(PTBSE, 0x00U);
/* PTCSE: PTCSE6=0,PTCSE5=0,PTCSE4=0,PTCSE3=0,PTCSE2=0,PTCSE1=0,PTCSE0=0 */
clrReg8Bits(PTCSE, 0x7FU);
/* PTDSE: PTDSE7=0,PTDSE6=0,PTDSE5=0,PTDSE4=0,PTDSE3=0,PTDSE2=0,PTDSE1=0,PTDSE0=0 */
setReg8(PTDSE, 0x00U);
/* PTESE: PTESE7=0,PTESE6=0,PTESE5=0,PTESE4=0,PTESE3=0,PTESE2=0,PTESE1=0,PTESE0=0 */
setReg8(PTESE, 0x00U);
/* PTFSE: PTFSE7=0,PTFSE6=0,PTFSE5=0,PTFSE4=0,PTFSE3=0,PTFSE2=0,PTFSE1=0,PTFSE0=0 */
setReg8(PTFSE, 0x00U);
/* PTGSE: PTGSE6=0,PTGSE5=0,PTGSE4=0,PTGSE3=0,PTGSE2=0,PTGSE1=0,PTGSE0=0 */
clrReg8Bits(PTGSE, 0x7FU);
/* PTADS: PTADS7=1,PTADS6=1,PTADS5=1,PTADS4=1,PTADS3=1,PTADS2=1,PTADS1=1,PTADS0=1 */
setReg8(PTADS, 0xFFU);
/* PTBDS: PTBDS7=1,PTBDS6=1,PTBDS5=1,PTBDS4=1,PTBDS3=1,PTBDS2=1,PTBDS1=1,PTBDS0=1 */
setReg8(PTBDS, 0xFFU);
/* PTCDS: ??=0,PTCDS6=1,PTCDS5=1,PTCDS4=1,PTCDS3=1,PTCDS2=1,PTCDS1=1,PTCDS0=1 */
setReg8(PTCDS, 0x7FU);
/* PTDDS: PTDDS7=1,PTDDS6=1,PTDDS5=1,PTDDS4=1,PTDDS3=1,PTDDS2=1,PTDDS1=1,PTDDS0=1 */
setReg8(PTDDS, 0xFFU);
/* PTEDS: PTEDS7=1,PTEDS6=1,PTEDS5=1,PTEDS4=1,PTEDS3=1,PTEDS2=1,PTEDS1=1,PTEDS0=1 */
setReg8(PTEDS, 0xFFU);
/* PTFDS: PTFDS7=1,PTFDS6=1,PTFDS5=1,PTFDS4=1,PTFDS3=1,PTFDS2=1,PTFDS1=1,PTFDS0=1 */
setReg8(PTFDS, 0xFFU);
/* PTGDS: ??=0,PTGDS6=1,PTGDS5=1,PTGDS4=1,PTGDS3=1,PTGDS2=1,PTGDS1=1,PTGDS0=1 */
setReg8(PTGDS, 0x7FU);
/* ### Shared modules init code ... */
/* ### "AD1" init code ... */
AD1_Init();
/* ### TimerInt "TI1" init code ... */
TI1_Init();
/* ### TimerInt "TI2" init code ... */
TI2_Init();
/* Common peripheral initialization - ENABLE */
/* TPM1SC: CLKSB=0,CLKSA=1 */
clrSetReg8Bits(TPM1SC, 0x10U, 0x08U);
CCR_lock = (byte)0;
__EI(); /* Enable interrupts */
}
以上是PE_low_level_init(); |
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void PE_low_level_init(void) { #ifdef PEX_RTOS_INIT PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */ #endif /* Common initialization of the CPU registers */ /* APCTL1: ADPC7=1,ADPC6=1,ADPC5=1,ADPC1=1 */ setReg8Bits(APCTL1, 0xE2U); /* APCTL2: ADPC11=1,ADPC10=1,ADPC9=1 */ setReg8Bits(APCTL2, 0x0EU); /* PTASE: PTASE7=0,PTASE6=0,PTASE5=0,PTASE4=0,PTASE3=0,PTASE2=0,PTASE1=0,PTASE0=0 */ ...