你要看 RESET 信号吗?
9.4.3 Device Reset
Asserting RESET low initiates the device ramp down. The output FETs go into a Hi-Z state after the ramp down
is complete. Output pull downs are active in both BTL mode and PBTL mode with RESET low.
In BTL modes, to accommodate bootstrap charging prior to switching start, asserting the RESET input low enables weak pull-down of the half-bridge outputs.
Asserting RESET low removes any fault information to be signaled on the FAULT output, that is, FAULT is forced high. A rising-edge transition on RESET allows the device to resume operation after a fault. To ensure thermal reliability, the rising edge of RESET must occur no sooner than 4 ms after the falling edge of FAULT.
The TPA3221 will enter a low power state once the ramp down sequence is complete.
这个信号是个输入信号.
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