Depeneded on which I/O you are referring. For HPI, the transfer rate
(in bytes) could be about 1/4 of CPU clock. For McBSP, the bit rate (kbps) could be
about 1/2 CPU clcok
You could cascade the emuation interface with the one on
EPLD/FPGA. Please see the following application notes for
details.http://www.ti.com/sc/docs/psheets/abstract/apps/spra439a.htm