捕获功能

2万 · 2019-8-18 18:12

void InitECapture()
{
ECap1Regs.ECEINT.all = 0x0000;          // Disable all capture interrupts
ECap1Regs.ECCLR.all = 0xFFFF;             // Clear all CAP interrupt flags
ECap1Regs.ECCTL1.bit.CAPLDEN = 0;       // Disable CAP1-CAP4 register loads
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 0;       // Make sure the counter is stopped

// Configure peripheral registers
  // ECap1Regs.ECCTL2.bit.CONT_ONESHT = 1;    // One-shot
/*  ECap1Regs.ECCTL2.bit.CONT_ONESHT = EC_CONTINUOUS;
ECap1Regs.ECCTL2.bit.STOP_WRAP =
//  ECap1Regs.ECCTL2.bit.STOP_WRAP = 3;       // Stop at 4 events
ECap1Regs.ECCTL1.bit.CAP1POL = 1;       // Falling edge
ECap1Regs.ECCTL1.bit.CAP2POL = 0;       // Rising edge
ECap1Regs.ECCTL1.bit.CAP3POL = 1;       // Falling edge
ECap1Regs.ECCTL1.bit.CAP4POL = 0;       // Rising edge
ECap1Regs.ECCTL1.bit.CTRRST1 = 1;       // Difference operation
ECap1Regs.ECCTL1.bit.CTRRST2 = 1;       // Difference operation
ECap1Regs.ECCTL1.bit.CTRRST3 = 1;       // Difference operation
ECap1Regs.ECCTL1.bit.CTRRST4 = 1;       // Difference operation
ECap1Regs.ECCTL2.bit.SYNCI_EN = 1;       // Enable sync in
ECap1Regs.ECCTL2.bit.SYNCO_SEL = 0;       // Pass through
ECap1Regs.ECCTL1.bit.CAPLDEN = 1;       // Enable capture units
*/
// Code snippet for CAP mode Delta Time, Rising and Falling
// edge triggers
// Initialization Time
//=======================
// ECAP module 1 config
ECap1Regs.ECCTL1.bit.CAP1POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CAP2POL = EC_FALLING;
ECap1Regs.ECCTL1.bit.CAP3POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CAP4POL = EC_FALLING;
ECap1Regs.ECCTL1.bit.CTRRST1 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST2 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST3 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST4 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CAPLDEN = EC_ENABLE;
ECap1Regs.ECCTL1.bit.PRESCALE = EC_DIV1;
ECap1Regs.ECCTL2.bit.CAP_APWM = EC_CAP_MODE;
ECap1Regs.ECCTL2.bit.CONT_ONESHT = EC_CONTINUOUS;
ECap1Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCO_DIS;
ECap1Regs.ECCTL2.bit.SYNCI_EN = EC_DISABLE;
ECap1Regs.ECCTL2.bit.TSCTRSTOP = EC_RUN; // Allow TSCTR to run

  //  ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;       // Start Counter
  //  ECap1Regs.ECCTL2.bit.REARM = 1;          // arm one-shot
  //  ECap1Regs.ECCTL1.bit.CAPLDEN = 1;       // Enable CAP1-CAP4 register loads
ECap1Regs.ECEINT.bit.CEVT4 = 1;          // 4 events = interrupt

}

interrupt void ecap1_isr(void)
{

// Cap input is syc'ed to SYSCLKOUT so there may be
// a +/- 1 cycle variation
/*
if(ECap1Regs.CAP2 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP2 < EPwm3Regs.TBPRD*2-1)
{
   Fail();
}

if(ECap1Regs.CAP3 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP3 < EPwm3Regs.TBPRD*2-1)
{
   Fail();
}

if(ECap1Regs.CAP4 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP4 < EPwm3Regs.TBPRD*2-1)
{
   Fail();
}

ECap1IntCount++;

if(EPwm3TimerDirection == EPWM_TIMER_UP)
{
      if(EPwm3Regs.TBPRD < PWM3_TIMER_MAX)
      {
         EPwm3Regs.TBPRD++;
      }
      else
      {
         EPwm3TimerDirection = EPWM_TIMER_DOWN;
         EPwm3Regs.TBPRD--;
      }
}
else
{
      if(EPwm3Regs.TBPRD > PWM3_TIMER_MIN)
      {
         EPwm3Regs.TBPRD--;
      }
      else
      {
         EPwm3TimerDirection = EPWM_TIMER_UP;
         EPwm3Regs.TBPRD++;
      }
}
*/
// Run Time ( e.g. CEVT1 triggered ISR call)
//==========================================
// Note: here Time-stamp directly represents the Duty cycle values.
DutyOnTime1 = ECap1Regs.CAP2; // Fetch Time-Stamp captured at T2
DutyOffTime1 = ECap1Regs.CAP3; // Fetch Time-Stamp captured at T3
DutyOnTime2 = ECap1Regs.CAP4; // Fetch Time-Stamp captured at T4
DutyOffTime2 = ECap1Regs.CAP1; // Fetch Time-Stamp captured at T1
Period1 = DutyOnTime1 + DutyOffTime1;
Period2 = DutyOnTime2 + DutyOffTime2;

ECap1PassCount++;

//  ECap1Regs.ECCLR.bit.CEVT1 = 1;
  // ECap1Regs.ECCLR.bit.INT = 1;
ECap1Regs.ECCTL2.bit.REARM = 1;

// Acknowledge this interrupt to receive more interrupts from group 4
ECap1Regs.ECCLR.bit.CEVT4  = 1;
ECap1Regs.ECCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
}