reg [31:0]Count;
//写法1:正确
always@(posedge sys_clk50,negedge rst_n) begin
if(!rst_n) begin
Count <=32'd0;
end
else begin
Count <=Count+1;
if(Count >= 5000) begin //写法正确
Count <=0;
end
end
end
//写法2:编译报错
always@(posedge sys_clk50,negedge rst_n) begin
if(!rst_n) begin
Count <=32'd0;
end
else begin
Count <=Count+1;
end
//-------------------------编译报错
if(Count >= 5000) begin
Count <=0;
end
end
verilog刚学,,不太明白,报错的提示也不理解,谢谢先
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