本帖最后由 xyz549040622 于 2019-12-21 23:19 编辑
// TI File $Revision: /Final ok version for SH's EVM board/ (Jack's remark: This is Dale's code, better than me)
//###########################################################################
// FILE: ADS8556-6ch.c
//
// TITLE: Test ADS8556 for total 6 channels.
// DESCRIPTION:
//###########################################################################
#include "DSP28x_Project.h"
#define BUF_6CH 6
#define BUF_Times 48
#define Result_total 288
#pragma DATA_SECTION(ADS8556_Result,"DMARAML6");
#pragma DATA_SECTION(ADS8556_Buf,"ZONE6DATA");
volatile Uint16 ADS8556_Result[Result_total];
volatile Uint16 ADS8556_Buf[BUF_6CH];
volatile Uint16 *ADCDest;
volatile Uint16 *ADCSource;
volatile Uint16 m;
volatile Uint16 INT_Flag; // INT finish flag
void Gpio_setup1(void);
void init_zone6(void);
void delay_loop(void);
void delay_short(void);
interrupt void xint1_isr(void);
void main(void)
{
Uint16 i;
Uint16 j;
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.XINT1 = &xint1_isr; // For ADS8556
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 3. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
// Step 4. User specific code:
Gpio_setup1(); // For ADS8556
// Initalize XINTF Zone
init_zone6(); // For ADS8556
//// InitXintf(); // Not required for this program
// Initialize Tables
for (i=0; i<BUF_6CH; i++)
{
ADS8556_Buf[i] = i;
}
for (j=0; j<Result_total; j++)
{
ADS8556_Result[j] = j;
}
// Enable Xint1 and XINT2 in the PIE: Group 1 interrupt 4 & 5
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
// PieCtrlRegs.PIEIER1.bit.INTx5 = 1;
IER |= M_INT1;
EINT;
// F28335's GPIO12(for ADS8556) is interrupt input for XINT1
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO12 = 0;
GpioCtrlRegs.GPAQSEL1.bit.GPIO12=0;
GpioCtrlRegs.GPACTRL.bit.QUALPRD1=0xFF;
EDIS;
EALLOW;
GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 12;
EDIS;
XIntruptRegs.XINT1CR.bit.POLARITY = 0;
XIntruptRegs.XINT1CR.bit.ENABLE = 1;
// Step 5. Configure and main loop
INT_Flag = 0;
ADCDest = &ADS8556_Result[0];
ADCSource = &ADS8556_Buf[0];
GpioDataRegs.GPASET.bit.GPIO7 = 1;
delay_loop();
GpioDataRegs.GPACLEAR.bit.GPIO7 = 1;
for(;;)
{
for(m=0; m<BUF_Times; m++)
{
GpioDataRegs.GPASET.bit.GPIO13 = 1; // Load output latch
delay_short();
while(INT_Flag == 0) { }
INT_Flag = 0;
delay_short();
}
}
//Just sit and loop forever (optional):
// for(;;);
}
// Step 6. Insert all local Interrupt Service Routines (ISRs) and functions here:
// If local ISRs are used, reassign vector addresses in vector table as shown in Step
interrupt void xint1_isr(void)
{
unsigned char n;
for (n=0; n<BUF_6CH; n++)
{
*ADCDest++ = *ADCSource++;
}
ADCSource = &ADS8556_Buf[0];
ADCDest= &ADS8556_Result[ m * 6];
INT_Flag = 1;
GpioDataRegs.GPACLEAR.bit.GPIO13 = 1; // Load output latch
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
void delay_loop(void)
{
unsigned char j;
unsigned char k;
for( j = 100; j > 0; j--)
for( k = 200; k > 0; k--);
}
void Gpio_setup1(void)
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO15 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO15 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;
GpioDataRegs.GPASET.bit.GPIO14 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO14 = 1;
GpioCtrlRegs.GPBPUD.bit.GPIO48 = 0;
GpioDataRegs.GPBCLEAR.bit.GPIO48 = 1;
GpioCtrlRegs.GPBMUX2.bit.GPIO48 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO48 = 1;
GpioCtrlRegs.GPBPUD.bit.GPIO49 = 0;
GpioDataRegs.GPBSET.bit.GPIO49 = 1;
GpioCtrlRegs.GPBMUX2.bit.GPIO49 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO49 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO7 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO7 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;
GpioDataRegs.GPASET.bit.GPIO5 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO5 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;
GpioDataRegs.GPASET.bit.GPIO6 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO16 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO16 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO17 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO17 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO18 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO18 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;
GpioDataRegs.GPASET.bit.GPIO19 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;
GpioDataRegs.GPACLEAR.bit.GPIO13 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO13 = 1;
}
void init_zone6(void)
{
// Make sure the XINTF clock is enabled
SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1;
// Configure the GPIO for XINTF with a 16-bit data bus
// This function is in DSP2833x_Xintf.c
InitXintf16Gpio();
EALLOW;
// All Zones---------------------------------
// Timing for all zones based on XTIMCLK = 1/2 SYSCLKOUT
XintfRegs.XINTCNF2.bit.XTIMCLK = 1; // 0 XTIMCLK = SYSCLKOUT
// Buffer up to 3 writes
XintfRegs.XINTCNF2.bit.WRBUFF = 3;
// XCLKOUT is enabled
XintfRegs.XINTCNF2.bit.CLKOFF = 0;
// XCLKOUT = XTIMCLK/2
XintfRegs.XINTCNF2.bit.CLKMODE = 1; // 0 XCLKOUT = XTIMCLK
// Zone 6------------------------------------
// When using ready, ACTIVE must be 1 or greater
// Lead must always be 1 or greater
// Zone write timing
XintfRegs.XTIMING6.bit.XWRLEAD = 3;
XintfRegs.XTIMING6.bit.XWRACTIVE = 7;
XintfRegs.XTIMING6.bit.XWRTRAIL = 7;
// Zone read timing
XintfRegs.XTIMING6.bit.XRDLEAD = 3; //1
XintfRegs.XTIMING6.bit.XRDACTIVE = 7; //3
XintfRegs.XTIMING6.bit.XRDTRAIL = 3; //0
// double all Zone read/write lead/active/trail timing
XintfRegs.XTIMING6.bit.X2TIMING = 1; // 0 - don't
// Zone will not sample XREADY signal
XintfRegs.XTIMING6.bit.USEREADY = 0;
XintfRegs.XTIMING6.bit.READYMODE = 0;
// 1,1 = x16 data bus
// 0,1 = x32 data bus
// other values are reserved
XintfRegs.XTIMING6.bit.XSIZE = 3;
EDIS;
//Force a pipeline flush to ensure that the write to
//the last register configured occurs before returning.
asm(" RPT #7 || NOP");
}
void delay_short(void)
{
unsigned char j;
unsigned char k;
for( j = 10; j > 0; j--)
for( k = 225; k > 0; k--);
}
//===========================================================================
// No more.
//===========================================================================
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