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shuaibaobao| 中级技术员

楼主 | 2011-11-30 20:56 | 只看该作者回帖奖励

|倒序浏览 |阅读模式

tcl, ni, se, dc, CONFIG

{CGU_SB->BCR[SYS_BASE_ID] = 0;                                     /*  禁能 BCR                   */

CGU_FdivConfig(0, 1, 1, 2);                                        /*  FDC0 1/2分频             */
CGU_SB->ESR[APB0_CLK_ID] = SELECT_FDC0 | ESR_EN;                   /*  选择FDC0                   */
CGU_SB->ESR[APB1_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[APB2_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[APB3_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[APB4_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[AHB_TO_INTC_CLK_ID]  = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[ARM926_BUSIF_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[ISRAM0_CLK_ID] = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[ISRAM1_CLK_ID] = SELECT_FDC0| ESR_EN;
CGU_SB->ESR[ISROM_CLK_ID]  = SELECT_FDC0 | ESR_EN;
CGU_SB->ESR[INTC_CLK_ID] = SELECT_FDC0 | ESR_EN;

CGU_FdivConfig(1, 0, 0, 0);                                        /*  FDC1 1分频                */
CGU_SB->ESR[ARM926_CORE_CLK_ID] = SELECT_FDC1 | ESR_EN;          /*  选择FDC1                   */

CGU_FdivConfig(5, 1, 1, 2);                                        /*  FDC5 2分频                */
CGU_SB->ESR[CLOCK_OUT_ID] = SELECT_FDC5 | ESR_EN;                /*  选择FDC5                   */

CGU_FdivConfig(6, 1, 1, 2);                                        /*  FDC6 2分频                */
CGU_SB->ESR[EBI_CLK_ID] = SELECT_FDC6 | ESR_EN;                /*  选择FDC6                   */
CGU_SB->BCR[SYS_BASE_ID]  = BCR_FD_RUN;                            /*  使能 BCR                   */

CGU_SetBaseFreq(SYS_BASE_ID, CGU_FIN_SELECT_HPPLL1);             /*  设置SCR[0],选择系统PLL    */

CGU_SB->BCR[AHB0_APB0_BASE_ID]  = 0;                               /*  禁能BCR                   */

CGU_FdivConfig(8, 1, 1, 2);                                        /*  FDC8 2分频                */
CGU_SB->ESR[AHB_TO_APB0_PCLK_ID] = SELECT_FDC8 | ESR_EN;          /*  选择FDC8                   */
CGU_SB->ESR[IOCONF_PCLK_ID]    = SELECT_FDC8 | ESR_EN;
CGU_SB->ESR[CGU_PCLK_ID]       = SELECT_FDC8 | ESR_EN;
CGU_SB->ESR[SYSCREG_PCLK_ID]    = SELECT_FDC8 | ESR_EN;
CGU_SB->BCR[AHB0_APB0_BASE_ID] = BCR_FD_RUN;                   /*  使能 BCR                   */
CGU_SetBaseFreq(AHB0_APB0_BASE_ID,CGU_FIN_SELECT_FFAST);          /*  设置SCR[1],选择FFAST       */
}
初学ARM,目前在用SMARTARM3130，上面是时钟设置，但搞不懂程序中分频是分的那个时钟？是输入的晶振时钟吗？

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