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stm32F7 驱动 nand flash

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楼主
hanzhen654|  楼主 | 2020-3-25 19:55 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
NAND, STM32F7, flash, ce, TI

执行NAND内存初始化序列
复制
HAL_StatusTypeDef  HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)

{

  /* Check the NAND handle state */

  if(hnand == NULL)

  {

     return HAL_ERROR;

  }



  if(hnand->State == HAL_NAND_STATE_RESET)

  {

    /* Allocate lock resource and initialize it */

    hnand->Lock = HAL_UNLOCKED;

    /* Initialize the low level hardware (MSP) */

    HAL_NAND_MspInit(hnand);

  } 



  /* Initialize NAND control Interface */

  FMC_NAND_Init(hnand->Instance, &(hnand->Init));

  

  /* Initialize NAND common space timing Interface */  

  FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);

  

  /* Initialize NAND attribute space timing Interface */  

  FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);

  

  /* Enable the NAND device */

  __FMC_NAND_ENABLE(hnand->Instance);

  

  /* Update the NAND controller state */

  hnand->State = HAL_NAND_STATE_READY;



  return HAL_OK;

}


使用特权

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沙发
hanzhen654|  楼主 | 2020-3-25 19:56 | 只看该作者
执行NAND内存取消初始化序列
复制
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)  

{

  /* Initialize the low level hardware (MSP) */

  HAL_NAND_MspDeInit(hnand);



  /* Configure the NAND registers with their reset values */

  FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);



  /* Reset the NAND controller state */

  hnand->State = HAL_NAND_STATE_RESET;



  /* Release Lock */

  __HAL_UNLOCK(hnand);



  return HAL_OK;

}


使用特权

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板凳
hanzhen654|  楼主 | 2020-3-25 19:57 | 只看该作者
NAND MSP 初始化
复制
__weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)

{

  /* Prevent unused argument(s) compilation warning */

  UNUSED(hnand);

  

  /* NOTE : This function Should not be modified, when the callback is needed,

            the HAL_NAND_MspInit could be implemented in the user file

   */ 

}


使用特权

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地板
hanzhen654|  楼主 | 2020-3-25 19:59 | 只看该作者
Nand 设备中断
复制
void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)

{

  /* Check NAND interrupt Rising edge flag */

  if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))

  {

    /* NAND interrupt callback*/

    HAL_NAND_ITCallback(hnand);

  

    /* Clear NAND interrupt Rising edge pending bit */

    __FMC_NAND_CLEAR_FLAG(hnand->Instance, FMC_FLAG_RISING_EDGE);

  }

  

  /* Check NAND interrupt Level flag */

  if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))

  {

    /* NAND interrupt callback*/

    HAL_NAND_ITCallback(hnand);

  

    /* Clear NAND interrupt Level pending bit */

    __FMC_NAND_CLEAR_FLAG(hnand->Instance, FMC_FLAG_LEVEL);

  }



  /* Check NAND interrupt Falling edge flag */

  if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))

  {

    /* NAND interrupt callback*/

    HAL_NAND_ITCallback(hnand);

  

    /* Clear NAND interrupt Falling edge pending bit */

    __FMC_NAND_CLEAR_FLAG(hnand->Instance, FMC_FLAG_FALLING_EDGE);

  }

  

  /* Check NAND interrupt FIFO empty flag */

  if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))

  {

    /* NAND interrupt callback*/

    HAL_NAND_ITCallback(hnand);

  

    /* Clear NAND interrupt FIFO empty pending bit */

    __FMC_NAND_CLEAR_FLAG(hnand->Instance, FMC_FLAG_FEMPT);

  }  



}


使用特权

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5楼
hanzhen654|  楼主 | 2020-3-25 20:00 | 只看该作者
nand 中断回调
复制
__weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)

{

  /* Prevent unused argument(s) compilation warning */

  UNUSED(hnand);

  

  /* NOTE : This function Should not be modified, when the callback is needed,

            the HAL_NAND_ITCallback could be implemented in the user file

   */

}


使用特权

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6楼
hanzhen654|  楼主 | 2020-3-25 20:09 | 只看该作者

读取NAND存储器电子签名
复制
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)

{

  __IO uint32_t data = 0;

  __IO uint32_t data1 = 0;

  uint32_t deviceAddress = 0;



  /* Process Locked */

  __HAL_LOCK(hnand);  

  

  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

    return HAL_BUSY;

  }

  

  /* Identify the device address */

  deviceAddress = NAND_DEVICE;

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_BUSY;

  

  /* Send Read ID command sequence */         

  *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA))  = NAND_CMD_READID;

  __DSB();

  *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

  __DSB();



  /* Read the electronic signature from NAND flash */

  if (hnand->Init.MemoryDataWidth == FMC_NAND_PCC_MEM_BUS_WIDTH_8)

  {

    data = *(__IO uint32_t *)deviceAddress;



    /* Return the data read */

    pNAND_ID->Maker_Id   = ADDR_1ST_CYCLE(data);

    pNAND_ID->Device_Id  = ADDR_2ND_CYCLE(data);

    pNAND_ID->Third_Id   = ADDR_3RD_CYCLE(data);

    pNAND_ID->Fourth_Id  = ADDR_4TH_CYCLE(data);

  }

  else

  {

    data = *(__IO uint32_t *)deviceAddress;

    data1 = *((__IO uint32_t *)deviceAddress + 4);

    

    /* Return the data read */

    pNAND_ID->Maker_Id   = ADDR_1ST_CYCLE(data);

    pNAND_ID->Device_Id  = ADDR_3RD_CYCLE(data);

    pNAND_ID->Third_Id   = ADDR_1ST_CYCLE(data1);

    pNAND_ID->Fourth_Id  = ADDR_3RD_CYCLE(data1);

  }



  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);   

   

  return HAL_OK;

}



使用特权

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7楼
hanzhen654|  楼主 | 2020-3-25 20:11 | 只看该作者
nand flash 复位
复制
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)

{

  uint32_t deviceAddress = 0;

  

  /* Process Locked */

  __HAL_LOCK(hnand);

    

  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

     return HAL_BUSY;

  }



  /* Identify the device address */  

  deviceAddress = NAND_DEVICE;

  

  /* Update the NAND controller state */   

  hnand->State = HAL_NAND_STATE_BUSY; 

  

  /* Send NAND reset command */  

  *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0xFF;



  /* Update the NAND controller state */   

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);    

  

  return HAL_OK;

  

}


使用特权

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8楼
hanzhen654|  楼主 | 2020-3-25 20:11 | 只看该作者
初始化nand 设备
复制
HAL_StatusTypeDef  HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig)

{

  hnand->Config.PageSize           = pDeviceConfig->PageSize;

  hnand->Config.SpareAreaSize      = pDeviceConfig->SpareAreaSize;

  hnand->Config.BlockSize          = pDeviceConfig->BlockSize;

  hnand->Config.BlockNbr           = pDeviceConfig->BlockNbr;

  hnand->Config.PlaneSize          = pDeviceConfig->PlaneSize;

  hnand->Config.PlaneNbr           = pDeviceConfig->PlaneNbr;

  hnand->Config.ExtraCommandEnable = pDeviceConfig->ExtraCommandEnable;

  

  return HAL_OK;

}


使用特权

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9楼
hanzhen654|  楼主 | 2020-3-25 20:12 | 只看该作者
nand 读页操作 8bit
复制
HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)

{

  __IO uint32_t index  = 0;

  uint32_t tickstart = 0U;

  uint32_t deviceAddress = 0, size = 0, numPagesRead = 0, nandAddress = 0;

  

  /* Process Locked */

  __HAL_LOCK(hnand); 

  

  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

     return HAL_BUSY;

  }

  

  /* Identify the device address */

  deviceAddress = NAND_DEVICE;



  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_BUSY;

  

  /* NAND raw address calculation */

  nandAddress = ARRAY_ADDRESS(pAddress, hnand);

  

  /* Page(s) read loop */  

  while((NumPageToRead != 0) && (nandAddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))

  {

    /* update the buffer size */

    size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesRead);

    

    /* Send read page command sequence */

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;

    __DSB();

    

    /* Cards with page size <= 512 bytes */

    if((hnand->Config.PageSize) <= 512)

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

    else /* (hnand->Config.PageSize) > 512 */

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }



    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA))  = NAND_CMD_AREA_TRUE1;

    __DSB();

    

    

    if(hnand->Config.ExtraCommandEnable == ENABLE)

    {

      /* Get tick */

      tickstart = HAL_GetTick();

      

      /* Read status until NAND is ready */

      while(HAL_NAND_Read_Status(hnand) != NAND_READY)

      {

        if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)

        {

          return HAL_TIMEOUT; 

        }

      }

      

      /* Go back to read mode */

      *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = ((uint8_t)0x00U);

      __DSB();

    }

    

    /* Get Data into Buffer */    

    for(; index < size; index++)

    {

      *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress;

    }

    

    /* Increment read pages number */

    numPagesRead++;

    

    /* Decrement pages to read */

    NumPageToRead--;

    

    /* Increment the NAND address */

    nandAddress = (uint32_t)(nandAddress + 1);

  }

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);  

    

  return HAL_OK;



}


使用特权

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10楼
hanzhen654|  楼主 | 2020-3-25 20:14 | 只看该作者
nand flash 页操作，16bit
复制
HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead)

{   

  __IO uint32_t index  = 0;

  uint32_t tickstart = 0;

  uint32_t deviceAddress = 0, size = 0, numPagesRead = 0, nandAddress = 0;

  

  /* Process Locked */

  __HAL_LOCK(hnand); 

  

  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

     return HAL_BUSY;

  }

  

  /* Identify the device address */

  deviceAddress = NAND_DEVICE;



  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_BUSY;

  

  /* NAND raw address calculation */

  nandAddress = ARRAY_ADDRESS(pAddress, hnand);

  

  /* Page(s) read loop */  

  while((NumPageToRead != 0) && (nandAddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))

  {           

    /* update the buffer size */

    size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesRead);

    

    /* Send read page command sequence */

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;  

    __DSB();

    

    /* Cards with page size <= 512 bytes */

    if((hnand->Config.PageSize) <= 512)

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

    else /* (hnand->Config.PageSize) > 512 */

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

  

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA))  = NAND_CMD_AREA_TRUE1;

    __DSB();

    

    if(hnand->Config.ExtraCommandEnable == ENABLE)

    {

      /* Get tick */

      tickstart = HAL_GetTick();

      

      /* Read status until NAND is ready */

      while(HAL_NAND_Read_Status(hnand) != NAND_READY)

      {

        if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)

        {

          return HAL_TIMEOUT; 

        }

      }

      

      /* Go back to read mode */

      *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = ((uint8_t)0x00U);

      __DSB();

    }

    

    /* Get Data into Buffer */    

    for(; index < size; index++)

    {

      *(uint16_t *)pBuffer++ = *(uint16_t *)deviceAddress;

    }

    

    /* Increment read pages number */

    numPagesRead++;

    

    /* Decrement pages to read */

    NumPageToRead--;

    

    /* Increment the NAND address */

    nandAddress = (uint32_t)(nandAddress + 1);

  }

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);  

    

  return HAL_OK;

}


使用特权

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11楼
hanzhen654|  楼主 | 2020-3-25 20:17 | 只看该作者
nand 写页操作 ，8bit
复制
HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)

{

  __IO uint32_t index = 0;

  uint32_t tickstart = 0;

  uint32_t deviceAddress = 0, size = 0, numPagesWritten = 0, nandAddress = 0;

  

  /* Process Locked */

  __HAL_LOCK(hnand);  



  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

     return HAL_BUSY;

  }

  

  /* Identify the device address */

  deviceAddress = NAND_DEVICE;

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_BUSY;

  

  /* NAND raw address calculation */

  nandAddress = ARRAY_ADDRESS(pAddress, hnand);

  

  /* Page(s) write loop */

  while((NumPageToWrite != 0) && (nandAddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))

  {  

    /* update the buffer size */

    size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesWritten);

 

    /* Send write page command sequence */

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;

    __DSB();

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE0;

    __DSB();



    /* Cards with page size <= 512 bytes */

    if((hnand->Config.PageSize) <= 512)

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

    else /* (hnand->Config.PageSize) > 512 */

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

    

    /* Write data to memory */

    for(; index < size; index++)

    {

      *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++;

      __DSB();

    }

   

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;

    __DSB();

    

    /* Read status until NAND is ready */

    while(HAL_NAND_Read_Status(hnand) != NAND_READY)

    {

      /* Get tick */

      tickstart = HAL_GetTick();

    

      if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)

      {

        return HAL_TIMEOUT; 

      } 

    }    

 

    /* Increment written pages number */

    numPagesWritten++;

    

    /* Decrement pages to write */

    NumPageToWrite--;

    

    /* Increment the NAND address */

    nandAddress = (uint32_t)(nandAddress + 1);

  }

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);      

  

  return HAL_OK;

}


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12楼
hanzhen654|  楼主 | 2020-3-25 20:18 | 只看该作者
nand 写页操作，16bit
复制
HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite)

{

  __IO uint32_t index = 0;

  uint32_t tickstart = 0;

  uint32_t deviceAddress = 0, size = 0, numPagesWritten = 0, nandAddress = 0;

  

  /* Process Locked */

  __HAL_LOCK(hnand);  



  /* Check the NAND controller state */

  if(hnand->State == HAL_NAND_STATE_BUSY)

  {

     return HAL_BUSY;

  }

  

  /* Identify the device address */

  deviceAddress = NAND_DEVICE;

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_BUSY;

  

  /* NAND raw address calculation */

  nandAddress = ARRAY_ADDRESS(pAddress, hnand);

  

  /* Page(s) write loop */

  while((NumPageToWrite != 0) && (nandAddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr))))

  {

    /* update the buffer size */

    size = (hnand->Config.PageSize) + ((hnand->Config.PageSize) * numPagesWritten);

 

    /* Send write page command sequence */

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;

    __DSB();

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE0;

    __DSB();



    /* Cards with page size <= 512 bytes */

    if((hnand->Config.PageSize) <= 512)

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

    else /* (hnand->Config.PageSize) > 512 */

    {

      if (((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) <= 65535)

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

      }

      else /* ((hnand->Config.BlockSize)*(hnand->Config.BlockNbr)) > 65535 */

      {

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1ST_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2ND_CYCLE(nandAddress);

        __DSB();

        *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3RD_CYCLE(nandAddress);

        __DSB();

      }

    }

  

    /* Write data to memory */

    for(; index < size; index++)

    {

      *(__IO uint16_t *)deviceAddress = *(uint16_t *)pBuffer++;

      __DSB();

    }

   

    *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;

    __DSB();

    

    /* Read status until NAND is ready */

    while(HAL_NAND_Read_Status(hnand) != NAND_READY)

    {

      /* Get tick */

      tickstart = HAL_GetTick();

    

      if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)

      {

        return HAL_TIMEOUT; 

      } 

    }   

 

    /* Increment written pages number */

    numPagesWritten++;

    

    /* Decrement pages to write */

    NumPageToWrite--;

    

    /* Increment the NAND address */

    nandAddress = (uint32_t)(nandAddress + 1);

  }

  

  /* Update the NAND controller state */ 

  hnand->State = HAL_NAND_STATE_READY;

  

  /* Process unlocked */

  __HAL_UNLOCK(hnand);      

  

  return HAL_OK;

}


使用特权

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13楼
wowu| | 2020-4-7 14:28 | 只看该作者
这是调用的库函数吗

使用特权

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14楼
xiaoqizi| | 2020-4-7 14:29 | 只看该作者
结构很清晰

使用特权

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15楼
磨砂| | 2020-4-7 14:29 | 只看该作者
能用在f4上吗

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16楼
hanzhen654|  楼主 | 2020-4-11 14:54 | 只看该作者
wowu 发表于 2020-4-7 14:28
这是调用的库函数吗

是啊，是用的库函数

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17楼
hanzhen654|  楼主 | 2020-4-11 14:54 | 只看该作者
磨砂 发表于 2020-4-7 14:29
能用在f4上吗

可以的，修改一下就可以了

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18楼
hanzhen654|  楼主 | 2020-4-11 14:55 | 只看该作者
xiaoqizi 发表于 2020-4-7 14:29
结构很清晰

主要是驱动部分得清晰啊

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19楼
隐去| | 2021-8-27 12:38 | 只看该作者
结构很清晰

使用特权

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20楼
koala889| | 2021-8-27 17:48 | 只看该作者
电子签名这个，我打算试试

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