this is my c code :
#include <stdio.h>
#include "platform.h"
#include "xparameters.h"
#include "xil_io.h"
#include "xintc_l.h"
#include "xintc.h"
//#include "helloworld.h"
//#define MSRSET(val) __asm__ __volatile__ ("msrset r0," #val );
static XIntc InterruptController; /* Instance of the Interrupt Controller */
//void IntrFromADIsr () __attribute__ ((interrupt_handler));
void IntrFromADIsr(void *data)
{
Xint32 data1;
print(" intr is coming \n");
#if 0
// xil_printf(" IntrFromADIsr stack addr : %d \n", &data1);
XIntc_AckIntr(XPAR_INTC_SINGLE_BASEADDR,0xFFFFFFFF);
microblaze_disable_interrupts();
Xil_Out32((XPAR_AD_DATAIN_USERIP_0_BASEADDR+0x200+0x1C),0xFFFFFFFF);
//print("Hello World 1\n\r");
Xil_Out32((XPAR_AD_DATAIN_USERIP_0_BASEADDR+0x200+0x28),0xFFFFFFFF);
//print("Hello World 2\n\r");
XIntc_MasterEnable(XPAR_INTC_SINGLE_BASEADDR);
XIntc_EnableIntr(XPAR_INTC_SINGLE_BASEADDR,0xFFFFFFFF);
//data1 = Xil_In32(XPAR_AD_DATAIN_USERIP_0_BASEADDR);
//Xil_Out32(XPAR_LED_4BIT_BASEADDR, data1);
#endif
}
int main()
{
Xint32 data=0, i=0,data1=0,j=100;
Xint32 Status,x=0;
init_platform();
Xil_Out32((XPAR_AD_DATAIN_USERIP_0_BASEADDR+0x200+0x1C),0xFFFFFFFF);
Xil_Out32((XPAR_AD_DATAIN_USERIP_0_BASEADDR+0x200+0x28),0xFFFFFFFF);
#if 0
x = &_interrupt_handler;
//x = &IntrFromADIsr;
*(int *)(0x10) = 0xb0000000 | (((x - 1)& 0xFFFF0000)>>16);
*(int *)(0x14) = 0xb8000000 | (((x - 1)& 0xFFFF));
#endif
xil_printf("\n interrupt addr : %d", *(int *)(0x10));
xil_printf("\n interrupt addr : %d", *(int *)(0x14));
Status=XIntc_Initialize(&InterruptController,XPAR_XPS_INTC_0_DEVICE_ID);
if(Status!=XST_SUCCESS){
print("Hello World 1\n\r");
return XST_FAILURE;
}else
{
print("Hello World 2 \n\r");
}
//microblaze_register_handler((XInterruptHandler)IntrFromADIsr, (void *)&data);
Status=XIntc_Connect((XIntc *)&InterruptController,2,(XInterruptHandler)IntrFromADIsr,(void *)&data);
//InterruptController.CfgPtr->AckBeforeService=0;
#if 0
for(i=0;i<31;i++)
{
InterruptController.CfgPtr->HandlerTable[i].Handler =(XInterruptHandler)IntrFromADIsr;
InterruptController.CfgPtr->HandlerTable[i].CallBackRef =0;
InterruptController.CfgPtr->AckBeforeService=0;
}
#endif
if(Status!=XST_SUCCESS)
{
print("Hello World 1\n\r");
return XST_FAILURE;
}else
{
print("Hello World \n\r");
}
Status=XIntc_Start(&InterruptController,XIN_REAL_MODE);
if(Status!=XST_SUCCESS)
{
print("Hello World 2\n\r");
return XST_FAILURE;
}else
{
print("Hello World \n\r");
}
XIntc_Enable(&InterruptController,2);
microblaze_enable_interrupts();
print("Hello World 3\n\r");
data = Xil_In32(XPAR_AD_DATAIN_USERIP_0_BASEADDR); // this is tigger a interrupt
print("Hello World 5\n\r");
xil_printf("intr state: %d \n",XIntc_GetIntrStatus(XPAR_INTC_SINGLE_BASEADDR));
while(1)
{
j=10;
while(j--){
xil_printf(" j=%d\n",j);
}
j=10;
xil_printf("set intr j: %d \n", j);
microblaze_enable_interrupts();
data1 = Xil_In32(XPAR_AD_DATAIN_USERIP_0_BASEADDR);
xil_printf("intr state: %d \n",XIntc_GetIntrStatus(XPAR_INTC_SINGLE_BASEADDR));
}
cleanup_platform();
return 0;
}
this is mhs file :
# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 12.4 Build EDK_MS4.81d
# Tue Dec 06 15:11:42 2011
# Target Board: Custom
# Family: spartan6
# Device: xc6slx45t
# Package: fgg484
# Speed Grade: -3
# Processor number: 1
# Processor 1: microblaze_0
# System clock frequency: 83.3
# Debug Interface: On-Chip HW Debug Module
# ##############################################################################
PARAMETER VERSION = 2.1.0
PORT fpga_0_rst_1_sys_rst_pin = sys_rst_s, DIR = I, SIGIS = RST, RST_POLARITY = 1
PORT mpmc_0_mcbx_dram_addr_pin = mpmc_0_mcbx_dram_addr, DIR = O, VEC = [12:0]
PORT mpmc_0_mcbx_dram_ba_pin = mpmc_0_mcbx_dram_ba, DIR = O, VEC = [2:0]
PORT mpmc_0_mcbx_dram_ras_n_pin = mpmc_0_mcbx_dram_ras_n, DIR = O
PORT mpmc_0_mcbx_dram_cas_n_pin = mpmc_0_mcbx_dram_cas_n, DIR = O
PORT mpmc_0_mcbx_dram_we_n_pin = mpmc_0_mcbx_dram_we_n, DIR = O
PORT mpmc_0_mcbx_dram_cke_pin = mpmc_0_mcbx_dram_cke, DIR = O
PORT mpmc_0_mcbx_dram_clk_pin = mpmc_0_mcbx_dram_clk, DIR = O, SIGIS = CLK
PORT mpmc_0_mcbx_dram_clk_n_pin = mpmc_0_mcbx_dram_clk_n, DIR = O, SIGIS = CLK
PORT mpmc_0_mcbx_dram_dq = mpmc_0_mcbx_dram_dq, DIR = IO, VEC = [15:0]
PORT mpmc_0_mcbx_dram_dqs = mpmc_0_mcbx_dram_dqs, DIR = IO
PORT mpmc_0_mcbx_dram_dqs_n = mpmc_0_mcbx_dram_dqs_n, DIR = IO
PORT mpmc_0_mcbx_dram_udqs = mpmc_0_mcbx_dram_udqs, DIR = IO
PORT mpmc_0_mcbx_dram_udqs_n = mpmc_0_mcbx_dram_udqs_n, DIR = IO
PORT mpmc_0_mcbx_dram_udm_pin = mpmc_0_mcbx_dram_udm, DIR = O
PORT mpmc_0_mcbx_dram_ldm_pin = mpmc_0_mcbx_dram_ldm, DIR = O
PORT mpmc_0_mcbx_dram_odt_pin = mpmc_0_mcbx_dram_odt, DIR = O
PORT mpmc_0_mcbx_dram_ddr3_rst_pin = mpmc_0_mcbx_dram_ddr3_rst, DIR = O
PORT mpmc_0_rzq = mpmc_0_rzq, DIR = IO
PORT mpmc_0_zio = mpmc_0_zio, DIR = IO
PORT util_bus_split_0_Out1_pin = flash_bpi_Mem_a_split, DIR = O, VEC = [0:23]
PORT led_4bit_GPIO_IO_O_pin = led_4bit_GPIO_IO_O, DIR = O, VEC = [0:3]
PORT push_button_4bit_GPIO_IO = push_button_4bit_GPIO_IO, DIR = IO, VEC = [0:3]
PORT switch_4bit_GPIO_IO = switch_4bit_GPIO_IO, DIR = IO, VEC = [0:3]
PORT fpga_0_clk_1_sys_clk_p = dcm_clk_s, DIR = I, SIGIS = CLK, DIFFERENTIAL_POLARITY = P, CLK_FREQ = 200000000
PORT fpga_0_clk_1_sys_clk_n = dcm_clk_s, DIR = I, SIGIS = CLK, DIFFERENTIAL_POLARITY = N, CLK_FREQ = 200000000
PORT flash_bpi_Mem_DQ_pin = flash_bpi_Mem_DQ, DIR = IO, VEC = [0:15]
PORT flash_bpi_Mem_ADV_LDN_pin = flash_bpi_Mem_ADV_LDN, DIR = O
PORT flash_bpi_Mem_WEN_pin = flash_bpi_Mem_WEN, DIR = O
PORT flash_bpi_Mem_OEN_pin = flash_bpi_Mem_OEN, DIR = O
PORT flash_bpi_Mem_CEN_pin = flash_bpi_Mem_CEN, DIR = O
PORT flash_bpi_Mem_RPN_pin = flash_bpi_Mem_RPN, DIR = O
BEGIN microblaze
PARAMETER INSTANCE = microblaze_0
PARAMETER C_USE_BARREL = 1
PARAMETER C_DEBUG_ENABLED = 1
PARAMETER HW_VER = 8.00.b
PARAMETER C_ICACHE_BASEADDR = 0x48000000
PARAMETER C_ICACHE_HIGHADDR = 0x4fffffff
PARAMETER C_DCACHE_BASEADDR = 0x48000000
PARAMETER C_DCACHE_HIGHADDR = 0x4fffffff
BUS_INTERFACE DLMB = dlmb
BUS_INTERFACE ILMB = ilmb
BUS_INTERFACE DPLB = mb_plb
BUS_INTERFACE IPLB = mb_plb
BUS_INTERFACE DEBUG = microblaze_0_mdm_bus
BUS_INTERFACE DXCL = microblaze_0_DXCL
BUS_INTERFACE IXCL = microblaze_0_IXCL
PORT MB_RESET = mb_reset
PORT INTERRUPT = xps_intc_0_Irq
END
BEGIN plb_v46
PARAMETER INSTANCE = mb_plb
PARAMETER HW_VER = 1.05.a
PORT PLB_Clk = clk_83_3333MHz
PORT SYS_Rst = sys_bus_reset
PORT Bus_Error_Det = mb_plb_Bus_Error_Det
END
BEGIN lmb_v10
PARAMETER INSTANCE = ilmb
PARAMETER HW_VER = 1.00.a
PORT LMB_Clk = clk_83_3333MHz
PORT SYS_Rst = sys_bus_reset
END
BEGIN lmb_v10
PARAMETER INSTANCE = dlmb
PARAMETER HW_VER = 1.00.a
PORT LMB_Clk = clk_83_3333MHz
PORT SYS_Rst = sys_bus_reset
END
BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = dlmb_cntlr
PARAMETER HW_VER = 2.10.b
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000ffff
BUS_INTERFACE SLMB = dlmb
BUS_INTERFACE BRAM_PORT = dlmb_port
END
BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = ilmb_cntlr
PARAMETER HW_VER = 2.10.b
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x0000ffff
BUS_INTERFACE SLMB = ilmb
BUS_INTERFACE BRAM_PORT = ilmb_port
END
BEGIN bram_block
PARAMETER INSTANCE = lmb_bram
PARAMETER HW_VER = 1.00.a
BUS_INTERFACE PORTA = ilmb_port
BUS_INTERFACE PORTB = dlmb_port
END
BEGIN clock_generator
PARAMETER INSTANCE = clock_generator_0
PARAMETER C_CLKIN_FREQ = 200000000
PARAMETER C_CLKOUT0_FREQ = 666666666
PARAMETER C_CLKOUT0_PHASE = 0
PARAMETER C_CLKOUT0_GROUP = PLL0
PARAMETER C_CLKOUT0_BUF = FALSE
PARAMETER C_EXT_RESET_HIGH = 1
PARAMETER HW_VER = 4.01.a
PARAMETER C_DEVICE = 6slx45t
PARAMETER C_PACKAGE = fgg484
PARAMETER C_SPEEDGRADE = -3
PARAMETER C_CLKOUT1_FREQ = 666666666
PARAMETER C_CLKOUT1_PHASE = 180
PARAMETER C_CLKOUT1_GROUP = PLL0
PARAMETER C_CLKOUT1_BUF = FALSE
PARAMETER C_CLKOUT2_FREQ = 83333333
PARAMETER C_CLKOUT2_GROUP = PLL0
PORT CLKIN = dcm_clk_s
PORT CLKOUT0 = clk_666_666mhzpll0_nobuf
PORT RST = sys_rst_s
PORT LOCKED = Dcm_all_locked
PORT CLKOUT1 = clk_666_666mhzpll0180_nobuf
PORT CLKOUT2 = clk_83_3333MHz
END
BEGIN mdm
PARAMETER INSTANCE = mdm_0
PARAMETER C_MB_DBG_PORTS = 1
PARAMETER C_USE_UART = 1
PARAMETER HW_VER = 2.00.a
PARAMETER C_BASEADDR = 0x84400000
PARAMETER C_HIGHADDR = 0x8440ffff
BUS_INTERFACE SPLB = mb_plb
BUS_INTERFACE MBDEBUG_0 = microblaze_0_mdm_bus
PORT Debug_SYS_Rst = Debug_SYS_Rst
PORT Interrupt = mdm_0_Interrupt
END
BEGIN proc_sys_reset
PARAMETER INSTANCE = proc_sys_reset_0
PARAMETER C_EXT_RESET_HIGH = 1
PARAMETER HW_VER = 3.00.a
PORT Slowest_sync_clk = clk_83_3333MHz
PORT Ext_Reset_In = sys_rst_s
PORT MB_Debug_Sys_Rst = Debug_SYS_Rst
PORT Dcm_locked = Dcm_all_locked
PORT MB_Reset = mb_reset
PORT Bus_Struct_Reset = sys_bus_reset
PORT Peripheral_Reset = sys_periph_reset
END
BEGIN mpmc
PARAMETER INSTANCE = mpmc_0
PARAMETER HW_VER = 6.02.a
PARAMETER C_PORT_CONFIG = 1
PARAMETER C_MCB_LOC = MEMC3
PARAMETER C_PIM0_BASETYPE = 1
PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E
PARAMETER C_MEM_TYPE = DDR3
PARAMETER C_MEM_DATA_WIDTH = 16
PARAMETER C_MEM_ODT_TYPE = 1
PARAMETER C_MCB_ZIO_LOC = M7
PARAMETER C_MCB_RZQ_LOC = K7
PARAMETER C_MEM_CALIBRATION_SOFT_IP = TRUE
PARAMETER C_MEM_SKIP_IN_TERM_CAL = 0
PARAMETER C_MEM_SKIP_DYNAMIC_CAL = 0
PARAMETER C_XCL0_B_IN_USE = 1
PARAMETER C_MPMC_BASEADDR = 0x48000000
PARAMETER C_MPMC_HIGHADDR = 0x4fffffff
BUS_INTERFACE XCL0_B = microblaze_0_DXCL
BUS_INTERFACE XCL0 = microblaze_0_IXCL
PORT MPMC_Rst = sys_periph_reset
PORT MPMC_Clk0 = clk_83_3333MHz
PORT MPMC_Clk_Mem_2x = clk_666_666mhzpll0_nobuf
PORT MPMC_Clk_Mem_2x_180 = clk_666_666mhzpll0180_nobuf
PORT MPMC_PLL_Lock = Dcm_all_locked
PORT mcbx_dram_addr = mpmc_0_mcbx_dram_addr
PORT mcbx_dram_ba = mpmc_0_mcbx_dram_ba
PORT mcbx_dram_ras_n = mpmc_0_mcbx_dram_ras_n
PORT mcbx_dram_cas_n = mpmc_0_mcbx_dram_cas_n
PORT mcbx_dram_we_n = mpmc_0_mcbx_dram_we_n
PORT mcbx_dram_cke = mpmc_0_mcbx_dram_cke
PORT mcbx_dram_clk = mpmc_0_mcbx_dram_clk
PORT mcbx_dram_clk_n = mpmc_0_mcbx_dram_clk_n
PORT mcbx_dram_dq = mpmc_0_mcbx_dram_dq
PORT mcbx_dram_dqs = mpmc_0_mcbx_dram_dqs
PORT mcbx_dram_dqs_n = mpmc_0_mcbx_dram_dqs_n
PORT mcbx_dram_udqs = mpmc_0_mcbx_dram_udqs
PORT mcbx_dram_udqs_n = mpmc_0_mcbx_dram_udqs_n
PORT mcbx_dram_udm = mpmc_0_mcbx_dram_udm
PORT mcbx_dram_ldm = mpmc_0_mcbx_dram_ldm
PORT mcbx_dram_odt = mpmc_0_mcbx_dram_odt
PORT mcbx_dram_ddr3_rst = mpmc_0_mcbx_dram_ddr3_rst
PORT rzq = mpmc_0_rzq
PORT zio = mpmc_0_zio
END
BEGIN xps_gpio
PARAMETER INSTANCE = led_4bit
PARAMETER HW_VER = 2.00.a
PARAMETER C_GPIO_WIDTH = 4
PARAMETER C_BASEADDR = 0x85586800
PARAMETER C_HIGHADDR = 0x85586bff
BUS_INTERFACE SPLB = mb_plb
PORT GPIO_IO_O = led_4bit_GPIO_IO_O
END
BEGIN xps_gpio
PARAMETER INSTANCE = push_button_4bit
PARAMETER HW_VER = 2.00.a
PARAMETER C_GPIO_WIDTH = 4
PARAMETER C_BASEADDR = 0x8478e000
PARAMETER C_HIGHADDR = 0x8478e3ff
BUS_INTERFACE SPLB = mb_plb
PORT GPIO_IO = push_button_4bit_GPIO_IO
END
BEGIN xps_gpio
PARAMETER INSTANCE = switch_4bit
PARAMETER HW_VER = 2.00.a
PARAMETER C_GPIO_WIDTH = 4
PARAMETER C_BASEADDR = 0x85904400
PARAMETER C_HIGHADDR = 0x859047ff
BUS_INTERFACE SPLB = mb_plb
PORT GPIO_IO = switch_4bit_GPIO_IO
END
BEGIN chipscope_icon
PARAMETER INSTANCE = chipscope_icon_0
PARAMETER HW_VER = 1.04.a
PARAMETER C_NUM_CONTROL_PORTS = 3
PORT control0 = chipscope_icon_0_control0
PORT control1 = chipscope_icon_0_control1
PORT control2 = chipscope_icon_0_control2
END
BEGIN chipscope_ila
PARAMETER INSTANCE = chipscope_ila_0
PARAMETER HW_VER = 1.03.a
PARAMETER C_NUM_DATA_SAMPLES = 1024
PARAMETER C_TRIG0_UNITS = 1
PARAMETER C_TRIG0_TRIGGER_IN_WIDTH = 155
PORT CHIPSCOPE_ILA_CONTROL = chipscope_icon_0_control1
PORT CLK = clk_83_3333MHz
PORT TRIG0 = ad_datain_userip_0_IP2INTC_Irpt_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_Data_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_RNW_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_RdCE_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_RdReq_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_WrCE_to_chipscope_ila_0 & ad_datain_userip_0_tst_Bus2IP_WrReq_to_chipscope_ila_0 & ad_datain_userip_0_tst_IP2Bus_AddrAck_to_chipscope_ila_0 & ad_datain_userip_0_tst_IP2Bus_IntrEvent_to_chipscope_ila_0 & ad_datain_userip_0_tst_IP2Bus_RdAck_to_chipscope_ila_0 & ad_datain_userip_0_tst_IP2Bus_WrAck_to_chipscope_ila_0 & xps_intc_0_Irq & ad_datain_userip_0_tst_Bus2IP_BE_to_chipscope_ila_0
END
BEGIN chipscope_plbv46_iba
PARAMETER INSTANCE = chipscope_plbv46_iba_0
PARAMETER HW_VER = 1.03.a
PARAMETER C_ENABLE_STORAGE_QUALIFICATION = 0
PARAMETER C_USE_MU_1A_RST_ERR_STAT = 0
PARAMETER C_USE_MU_4_WR_DBUS = 1
PARAMETER C_USE_MU_6A_SLV_CTL = 1
PARAMETER C_USE_MU_6B_SLV_SZ_WADDR = 1
PARAMETER C_USE_MU_7_SLV_BSY = 1
PARAMETER C_USE_MU_8_SLV_RD_ERR = 1
BUS_INTERFACE MON_PLB = mb_plb
PORT chipscope_icon_control = chipscope_icon_0_control0
END
BEGIN util_bus_split
PARAMETER INSTANCE = util_bus_split_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 32
PARAMETER C_LEFT_POS = 7
PARAMETER C_SPLIT = 31
PORT Out1 = flash_bpi_Mem_a_split
PORT Sig = flash_bpi_Mem_A
END
BEGIN xps_mch_emc
PARAMETER INSTANCE = flash_bpi
PARAMETER HW_VER = 3.01.a
PARAMETER C_NUM_CHANNELS = 0
PARAMETER C_MAX_MEM_WIDTH = 16
PARAMETER C_MEM0_WIDTH = 16
PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
PARAMETER C_TCEDV_PS_MEM_0 = 110000
PARAMETER C_TAVDV_PS_MEM_0 = 110000
PARAMETER C_THZCE_PS_MEM_0 = 35000
PARAMETER C_TWC_PS_MEM_0 = 11000
PARAMETER C_TWP_PS_MEM_0 = 70000
PARAMETER C_TLZWE_PS_MEM_0 = 35000
PARAMETER C_MEM0_BASEADDR = 0x86000000
PARAMETER C_MEM0_HIGHADDR = 0x87ffffff
BUS_INTERFACE SPLB = mb_plb
PORT RdClk = clk_83_3333MHz
PORT Mem_A = flash_bpi_Mem_A
PORT Mem_RPN = flash_bpi_Mem_RPN
PORT Mem_CEN = flash_bpi_Mem_CEN
PORT Mem_OEN = flash_bpi_Mem_OEN
PORT Mem_WEN = flash_bpi_Mem_WEN
PORT Mem_ADV_LDN = flash_bpi_Mem_ADV_LDN
PORT Mem_DQ = flash_bpi_Mem_DQ
END
BEGIN ad_datain_from_fifo
PARAMETER INSTANCE = ad_datain_from_fifo_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x84b0c000
PARAMETER C_HIGHADDR = 0x84b0c7ff
PARAMETER C_MEM0_BASEADDR = 0x85c82400
PARAMETER C_MEM0_HIGHADDR = 0x85c8247f
BUS_INTERFACE SPLB = mb_plb
PORT IP2INTC_Irpt = ad_datain_from_fifo_0_IP2INTC_Irpt
END
BEGIN xps_intc
PARAMETER INSTANCE = xps_intc_0
PARAMETER HW_VER = 2.01.a
PARAMETER C_IRQ_IS_LEVEL = 0
PARAMETER C_BASEADDR = 0x84200000
PARAMETER C_HIGHADDR = 0x8420001f
PARAMETER C_HAS_IVR = 1
BUS_INTERFACE SPLB = mb_plb
PORT Irq = xps_intc_0_Irq
PORT Intr = ad_datain_userip_0_IP2INTC_Irpt_to_chipscope_ila_0 & mb_plb_Bus_Error_Det & mdm_0_Interrupt
END
BEGIN ad_datain_userip
PARAMETER INSTANCE = ad_datain_userip_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x85208000
PARAMETER C_HIGHADDR = 0x852087ff
PARAMETER C_MEM0_BASEADDR = 0x84e8a400
PARAMETER C_MEM0_HIGHADDR = 0x84e8a47f
BUS_INTERFACE SPLB = mb_plb
PORT IP2INTC_Irpt = ad_datain_userip_0_IP2INTC_Irpt_to_chipscope_ila_0
PORT tst_Bus2IP_Data = ad_datain_userip_0_tst_Bus2IP_Data_to_chipscope_ila_0
PORT tst_Bus2IP_RNW = ad_datain_userip_0_tst_Bus2IP_RNW_to_chipscope_ila_0
PORT tst_Bus2IP_RdCE = ad_datain_userip_0_tst_Bus2IP_RdCE_to_chipscope_ila_0
PORT tst_Bus2IP_RdReq = ad_datain_userip_0_tst_Bus2IP_RdReq_to_chipscope_ila_0
PORT tst_Bus2IP_WrCE = ad_datain_userip_0_tst_Bus2IP_WrCE_to_chipscope_ila_0
PORT tst_Bus2IP_WrReq = ad_datain_userip_0_tst_Bus2IP_WrReq_to_chipscope_ila_0
PORT tst_IP2Bus_AddrAck = ad_datain_userip_0_tst_IP2Bus_AddrAck_to_chipscope_ila_0
PORT tst_IP2Bus_IntrEvent = ad_datain_userip_0_tst_IP2Bus_IntrEvent_to_chipscope_ila_0
PORT tst_IP2Bus_RdAck = ad_datain_userip_0_tst_IP2Bus_RdAck_to_chipscope_ila_0
PORT tst_IP2Bus_WrAck = ad_datain_userip_0_tst_IP2Bus_WrAck_to_chipscope_ila_0
PORT tst_Bus2IP_BE = ad_datain_userip_0_tst_Bus2IP_BE_to_chipscope_ila_0
END
BEGIN chipscope_vio
PARAMETER INSTANCE = chipscope_vio_0
PARAMETER HW_VER = 1.03.a
PARAMETER C_ASYNC_OUTPUT_ENABLE = 1
PARAMETER C_ASYNC_OUTPUT_WIDTH = 1
PORT chipscope_icon_control = chipscope_icon_0_control2
PORT clk = clk_83_3333MHz
PORT async_out = chipscope_vio_0_async_out
END
this is mss file of the project:
PARAMETER VERSION = 2.2.0
BEGIN OS
PARAMETER OS_NAME = standalone
PARAMETER OS_VER = 3.00.a
PARAMETER PROC_INSTANCE = microblaze_0
PARAMETER STDIN = mdm_0
PARAMETER STDOUT = mdm_0
END
BEGIN PROCESSOR
PARAMETER DRIVER_NAME = cpu
PARAMETER DRIVER_VER = 1.13.a
PARAMETER HW_INSTANCE = microblaze_0
PARAMETER COMPILER = mb-gcc
PARAMETER ARCHIVER = mb-ar
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = bram
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = dlmb_cntlr
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = bram
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = ilmb_cntlr
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = lmb_bram
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = clock_generator_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = uartlite
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = mdm_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = proc_sys_reset_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = mpmc
PARAMETER DRIVER_VER = 4.01.a
PARAMETER HW_INSTANCE = mpmc_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = led_4bit
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = push_button_4bit
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = switch_4bit
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = emc
PARAMETER DRIVER_VER = 3.01.a
PARAMETER HW_INSTANCE = flash_bpi
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = ad_datain_from_fifo_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = intc
PARAMETER DRIVER_VER = 2.02.a
PARAMETER HW_INSTANCE = xps_intc_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = ad_datain_userip_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = mb_plb
END |
楼主
标题置顶
标题高亮
