main()
{
mk_01=0;
CLK->CMSR&=0XE1;
CLK->ECKR&=0X01;
CLK->ICKR&=0X01;
CLK->CKDIVR&=0X00;
CLK->PCKENR1&=0X80;
TIM1->ARRH=0XFF;
TIM1->ARRL=0X0F;
TIM1->SR1=0X00;
TIM1->SR2=0X00;
TIM1->PSCRH=0X00;
TIM1->PSCRL=0X01;
TIM1->SMCR&=0X00;
TIM1->ETR&=0X00;
TIM1->EGR&=0X01;
TIM1->CR1&=0X01;
while (1)
{
if(TIM1->CNTRL==0XFF)
{
mk_01=0X06;
}
else
mk_01=0x60;
}
} |