I am new to AXI4 protocol. I would like to know how many clock cycles are required to complete a AXI4 burst write transaction.
Eg. Burst length- Two , Burst size 16 bytes.
Please give me answers for different types of data bus width say for bus width of 64 bits(8 bytes) and 128 bits(16 bytes). |
楼主
标题置顶
标题高亮
