我有一个独立的应用程序,在A53处理器上的OCM中的EL3上运行。该代码从Flash启动。我将一个精灵图像加载到RAM中,需要转换到在EL1上运行的入口点。
我尝试通过以下代码进行过渡:
/*/
/**
@file asm_switch_to_EL1.s*
This file contains the code tat switches from EL3 to EL1 for the Cortex A53 processor*
<pre>MODIFICATION HISTORY:*
Ver Who Date Changes1.00 kcm 11/26/19 Initial version*
</pre>*
@note*
None.*
/
.globl switch_to_EL1
// *
// SCTLR_EL1, System Control Register (EL1), Page 2654 of AArch64-Reference-Manual.
// *
define SCTLR_RESERVED (3 << 28) | (3 << 22) | (1 << 20) | (1 << 11)define SCTLR_EE_LITTLE_ENDIAN (0 << 25)define SCTLR_EOE_LITTLE_ENDIAN (0 << 24)define SCTLR_I_CACHE_DISABLED (0 << 12)define SCTLR_D_CACHE_DISABLED (0 << 2)define SCTLR_MMU_DISABLED (0 << 0)define SCTLR_MMU_ENABLED (1 << 0)define SCTLR_VALUE_MMU_DISABLED (SCTLR_RESERVED | SCTLR_EE_LITTLE_ENDIAN | SCTLR_I_CACHE_DISABLED | SCTLR_D_CACHE_DISABLED | SCTLR_MMU_DISABLED)// *
// HCR_EL2, Hypervisor Configuration Register (EL2), Page 2487 of AArch64-Reference-Manual.
// *
define HCR_RW (1 << 31)define HCR_VALUE HCR_RW// *
// SCR_EL3, Secure Configuration Register (EL3), Page 2648 of AArch64-Reference-Manual.
// *
define SCR_RESERVED (3 << 4)define SCR_RW (1 << 10)define SCR_NS (1 << 0)define SCR_VALUE (SCR_RESERVED | SCR_RW | SCR_NS)// *
// SPSR_EL3, Saved Program Status Register (EL3) Page 389 of AArch64-Reference-Manual.
// *
define SPSR_MASK_ALL (7 << 6)define SPSR_EL1h (5 << 0)define SPSR_VALUE (SPSR_MASK_ALL | SPSR_EL1h)switch_to_EL1:
ldr x1, =SCTLR_VALUE_MMU_DISABLED\nmsr sctlr_el1, x1\n\nldr x1, =HCR_VALUE\nmsr hcr_el2, x1\n\nldr x1, =SCR_VALUE\nmsr scr_el3, x1\n\nldr x1, =SPSR_VALUE\nmsr spsr_el3, x1\n\nmsr elr_el3, x0\n\neret\n如果我尝试在Xylinx ZCU111模块上使用JTAG调试器进行调试,则在尝试执行ERET指令时调试器似乎会丢失。\n我已经与Xylinx工程师讨论了此问题,他建议我发布到此论坛。
他还建议我
我的猜测是,由于我是从异常返回的,因此可能需要设置vbar_el1寄存器。 |